• ETRI Journal
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• v.26 no.1
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• pp.61-64
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• 2004

We have explored the fabrication of an InP/InGaAs single heterojunction bipolar transistor (HBT) and a wave guide p-i-n photodiode (PD) on two kinds of double stacked layers for the implementation of an optoelectronic millimeter-wave monolithic integrated circuit (OEMMIC). We applied a photosensitive polyimide for passivation and integration to overcome the large difference between the HBT and PD layers of around $3{\mu}m$. Our experiment showed that the RF characteristics of the HBT were dependent on the location of the PD layer, while the dc performances of the HBTs and PDs were independent of the type of stacked layer used. The $F_t$ and $F_{max}$ of the HBTs on the HBT/PD stacked layer were 10% lower than those of the HBTs on the PD/HBT stacked layer.

• ETRI Journal
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• v.33 no.6
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• pp.880-886
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• 2011

With the introduction of high-current 8-inch solar cells, conventional Schottky bypass diodes, usually adopted in photovoltaic (PV) panels to prevent the hot spot phenomenon, are becoming ineffective as they cause relatively high voltage drops with associated undue power consumption. In this paper, we present the architecture of an active circuit that reduces the aforementioned power dissipation by profitably replacing the bypass diode through a power MOS switch with its embedded driving circuitry. Experimental prototypes were fabricated and tested, showing that the proposed solution allows a reduction of the power dissipation by more than 70% compared to conventional Schottky diodes. The whole circuit does not require a dedicated DC power and is fully compatible with standard CMOS technologies. This enables its integration, even directly on the panel, thereby opening new scenarios for next generation PV systems.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.344-348
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• 2002

As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• ETRI Journal
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• v.44 no.3
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• pp.491-503
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• 2022

Metal-oxide-semiconductor field-effect transistors (MOSFETs) are continuously scaling down in the nanoscale region to improve the functionality of integrated circuits. The scaling down of MOSFET devices causes short-channel effects in the nanoscale region. In nanoscale region, leakage current components are increasing, resulting in substantial power dissipation. Very large-scale integration designers are constantly exploring different effective methods of mitigating the power dissipation. In this study, a transistor-level input-controlled stacking (ICS) approach is proposed for minimizing significant power dissipation. A low-power ICS approach is extensively discussed to verify its importance in low-power applications. Circuit reliability is monitored for process and voltage and temperature variations. The ICS approach is designed and simulated using Cadence's tools and compared with existing low-power and high-speed techniques at a 22-nm technology node. The ICS approach decreases power dissipation by 84.95% at a cost of 5.89 times increase in propagation delay, and improves energy dissipation reliability by 82.54% compared with conventional circuit for a ring oscillator comprising 5-inverters.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.3
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• pp.403-408
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• 2008

The gyroscope is the sensor for detecting the rotation in inertial reference frame and constitute the navigation system together an accelerometer. As the inertial reference equipment for attitude determination and control in the satellite, the mechanical gyroscope has been used but it bring the disturbance for mass unbalance so the disturbance give a bad influence to the observation satellite mission because the mechanical gyroscope has the rotation parts. During the launch. The mechanical gyroscope is weak in vibration, shock and has the defect of narrow operating temperature range so it need the special design in integration. Recently the low orbit observation satellite for seeking the high pointing accuracy of image camera payload accept the FOG(Fiber Optic Gyro) or RLG(Ring Laser Gyro) for the attitude determination and control. The Ring Laser Gyro makes use of the Sanac effect within a resonant ring cavity of a He-Ne laser and has more accuracy than the other gyros. It need the 1000V DC to create the He-Ne plasma in discharge tube. In this paper, the design process of the High Voltage Power Supply for RLG(Ring Laser Gyroscope) is described. The specification for High Voltage Power Supply (HVPS) is proposed. Also, The analysis of flyback converter topology is explained. The Design for the HVPS is composed of the inverter circuit, feedback control circuit, high frequency switching transformer design and voltage doubler circuit.

• Transactions of the Korean Society of Automotive Engineers
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• v.20 no.1
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• pp.124-130
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• 2012

An injection mold cooling circuit for an automotive front bumper was optimally designed in order to simultaneously minimize the average of the standard deviations of the temperature and the difference in mean temperatures of the upper and lower molds for uniform cooling. The temperature distribution for a specified design was evaluated by Moldflow Insight 2010, a commercial injection molding analysis tool. For efficient design, PIAnO (Process Integration, Automation and Optimization), a commercial PIDO tool, was used to integrate and automate injection molding analysis procedure. The weighted-sum method was used to handle the multi-objective optimization problem and PQRSM, a function-based sequential approximate optimizer equipped in PIAnO, to handle numerically noisy responses with respect to the variation of design variables. The optimal average of the standard deviations and difference in mean temperatures were found to be reduced by 9.2% and 56.52%, respectively, compared to the initial ones.

• Transactions on Electrical and Electronic Materials
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• v.12 no.5
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• pp.175-188
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• 2011

As complementary metal-oxide semiconductor (CMOS) continues to scale down deeper into the nanoscale, various device non-idealities cause the I-V characteristics to be substantially different from well-tempered metal-oxide semiconductor field-effect transistors (MOSFETs). The last few years witnessed a dramatic increase in nanotechnology research, especially the nanoelectronics. These technologies vary in their maturity. Carbon nanotubes (CNTs) are at the forefront of these new materials because of the unique mechanical and electronic properties. CNTFET is the most promising technology to extend or complement traditional silicon technology due to three reasons: first, the operation principle and the device structure are similar to CMOS devices and it is possible to reuse the established CMOS design infrastructure. Second, it is also possible to reuse CMOS fabrication process. And the most important reason is that CNTFET has the best experimentally demonstrated device current carrying ability to date. This paper discusses and reviewsthe feasibility of the CNTFET's application at this point of time in integrated circuits design by investigating different types of circuit blocks considering the advantages that the CNTFETs offer.

• Journal of Power Electronics
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• v.18 no.2
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• pp.364-374
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• 2018

A novel passive lossless soft-switching single inductor dual buck full-bridge inverter (PLSSIDBFBI) is presented in this paper. To accomplish this, a passive lossless snubber circuit is added to a dual buck full-bridge inverter. Therefore, the advantages of the dual buck full-bridge inverter are included in the proposed inverter, and the inverter has just one filter inductor, which can decrease the system volume and improve the integration. In addition, the passive lossless snubber circuit achieves soft-switching by its own resonance, and all of the energy stored in the passive lossless snubber circuit can be transferred to load. A comparison between eight topologies is performed in this paper, and the analysis shows that the proposed soft-switching inverter topology has high reliability and efficiency. Finally, experimental results obtained with a 1 kW prototype verify the theoretical analysis and demonstrate the prominent characteristics of a reduced switching loss and improved efficiency.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.595-604
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• 2016

Utilizing a standard 130-nm CMOS process, a RF frontend is designed at 24 GHz for automotive collision avoidance radar application. Single IF direct conversion receiver (DCR) architecture is adopted to achieve high integration level and to alleviate the DCR problem. The proposed frontend is composed of a two-stage LNA and downconversion mixers. To save power consumption, and to enhance gain and linearity, stacked NMOS-PMOS $g_m$-boosting technique is employed in the design of LNA as the first stage. The switch transistors in the mixing stage are biased in subthreshold region to achieve low power consumption. The single balanced mixer is designed in PMOS transistors and is also realized based on the well-known folded architecture to increase voltage headroom. This frontend circuit features enhancement in gain, linearity, and power dissipation. The proposed circuit showed a maximum conversion gain of 19.6 dB and noise figure of 3 dB at the operation frequency. It also showed input and output return losses of less than -10 dB within bandwidth. Furthermore, the port-to-port isolation illustrated excellent characteristic between two ports. This frontend showed the third-order input intercept point (IIP3) of 3 dBm for the whole circuit with power dissipation of 6.5 mW from a 1.5 V supply.

• Journal of Electrical Engineering and Technology
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• v.11 no.3
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• pp.644-652
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• 2016

This paper presents an improved single-stage ac-dc LED-drive flyback converter using the transformer-coupled lossless (TCL) snubber. The proposed converter is derived from the integration of a full-bridge diode rectifier and a conventional flyback converter with a simple TCL snubber. The TCL snubber circuit is composed of only two diodes, a capacitor, and a transformer-coupled auxiliary winding. The TCL snubber limits the surge voltage of the switch and regenerates the energy stored in the leakage inductance of the transformer. Also, the switch of the proposed converter is turned on at a minimum voltage using a formed resonant circuit. Thus, the proposed converter achieves high efficiency. The proposed converter utilizes only one general power factor correction (PFC) control IC as its controller and performs both PFC and output power regulation, simultaneously. Therefore, the proposed converter provides a simple structure and an economic implementation and achieves a high power factor without the need for any separate PFC circuit. In this paper, the operational principle of the proposed converter is explained in detail and the design guideline of the proposed converter is briefly shown. Experimental results for a 40-W prototype are shown to validate the performance of the proposed converter.