• Title/Summary/Keyword: Circuit analysis

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Analysis of Active Characteristic the Low-voltage Circuit Breaker for Harmonics (고조파에 의한 저압용 차단기의 동작특성 해석)

  • Choi, M.G.;Jeong, B.H.;Park, J.C.;Kim, H.G.;Mok, H.S.;Choe, G.H.
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1474-1476
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    • 2005
  • Because MCCB, ELB, etc. discharge both technical and economical duty, it is important that the study of circuit breaker guarantee high-performance and realize the power distribution system with reliability. Because of complexity electrical equipment, the accident with imbalance and flicker occur often according to technical improvement. However, study of accident with harmonics remains. In this paper, the essential characteristic of circuit breaker is introduced. To analysis operation of circuit breaker, theoretical model and several simulations have been performed.

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Nonlinear Magnetic Modeling of EI Core Inductor by PLECS Simulation

  • Wang, Zhuning;Sul, Seung-Ki
    • Proceedings of the KIPE Conference
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    • 2015.11a
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    • pp.9-10
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    • 2015
  • EI core inductor in power electronic circuit simulation is usually assumed as linear by using matrix model. However, nonlinear magnetic characteristics such as B-H characteristic are also important for the accurate simulation of the circuit behavior. To model nonlinear magnetic characteristics of EI core inductor with only DC bias table, this paper presents a method in PLECS simulation tool which is a commercially available simulation tool for power electronics circuit analysis. Comparing with ideal matrix model, the simplification and accuracy are improved by this modeling method. Also, compared to analysis by FEM, it is much simpler, faster and easier to simulate with power electronics circuit. Validation of the proposed model was verified by simulation and experiment results.

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Capacitance Value Analysis of Sub-module Test Circuit for MMC-based HVDC System (MMC 기반 HVDC 시스템용 서브모듈 시험회로의 커패시터 용량 분석)

  • Seo, Byuong-Jun;Park, Kwon-Sik;Jo, Kwang-Rae;Nho, Eui-Cheol;Kim, Heung-Geun;Chun, Tae-Won;Kim, Tae-Jin;Lee, Jong-Pil
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.6
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    • pp.433-439
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    • 2018
  • This study considers the design of a submodule test circuit for the modular multi-level converter (MMC)-based HVDC systems. A novel submodule test circuit is proposed to provide not only an AC but also a DC component to the submodule current. However, the current waveforms depend on the capacitor voltages. Therefore, determining the capacitance value of the test circuit is important. Finding a proper capacitance value is easy when the proposed analysis method is used. Simulation and experimental results show the usefulness of the proposed method.

Extension of Cut-off Capacity of DC Circuit Breaker due to Superconducting Coil Application (초전도 코일 적용으로 인한 DC 차단기의 차단 용량 증대)

  • Choi, Hye-Won;Choi, Hyo-Sang
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.68 no.4
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    • pp.593-597
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    • 2019
  • We proposed a current Interruption type DC superconducting circuit breaker(I-DC SCB), a protection device that combines the current limiting technology of a superconductor with the cut-off technology of circuit breaker. Unlike existing protective devices, the current I-DC SCB is a device that combines two protection functions, notably improving failure probability and operational reliability. It is also applicable to all DC systems, such as HV, MV, and LVDC, due to the ease in capacity increase. The 100 kV I-DC SCB was designed after taking into account the actual power system conditions, followed by an analysis of the transient characteristics and the breaking range of the limiter. The results of the analysis showed that the I-DC SCB had a fault current limit of about 75% at the rated voltage, and completed the cut-off operation within about 20 ms.

High-Frequency Equivalent Circuit Model for Differential Mode Noise Analysis of DC-DC Buck Converter (DC-DC 벅 컨버터의 차동모드 노이즈 분석을 위한 고주파 등가회로 모델)

  • Shin, Juhyun;Kim, Woojung;Cha, Hanju
    • KEPCO Journal on Electric Power and Energy
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    • v.6 no.4
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    • pp.473-480
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    • 2020
  • In this paper, we proposed a high frequency equivalent circuit considering parasitic impedance components for differential noise analysis on the input stage during DC-DC buck converter switching operation. Based on the proposed equivalent circuit model, we presented a method to measure parasitic impedance parameters included in DC bus plate, IGBT, and PCB track using the gain phase method of a network analyzer. In order to verify the validity of this model, a DC-DC prototype consisting of a buck converter, a signal analyzer, and a LISN device, and then resonance frequency was measured in the frequency range between 150 kHz and 30 MHz. The validity of the parasitic impedance measurement method and the proposed equivalent model is verified by deriving that the measured resonance frequency and the resonance frequency of the proposed high frequency equivalent model are the same.

Case of Improving Design by Using Analysis Model of Hydraulic System for Dental Chair (치과용 유니트체어 유압구동 시스템 해석모델을 활용한 개선설계 사례)

  • Dae Kyung Noh;Dong Won Lee;Taek June Kim;Joo Sup Jang
    • Journal of Drive and Control
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    • v.20 no.2
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    • pp.1-6
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    • 2023
  • This study aims to develop a Korean dental chair hydraulic circuit by improving the existing equipment in order to localize foreign leading companies' products. The suggested Hydraulic circuit can be applicable to varied sectors where height and backrest angle control of chair-type equipment are required. The study followed the steps below. First, three kinds of foreign hydraulic circuits were analyzed and three kinds of Korean dental chair hydraulic circuits were suggested. Second, it was determined whether the three kinds of Korean hydraulic circuits operate normally through SimulationX, a software specialized in multi domain analysis, and the effectiveness of each circuit was examined.

Thermal Stress Analysis for the Printed Circuit Board of Electronic Packages (전자장비 회로기판의 열응력해석)

  • Kwon Y. J.;Kim J. A.
    • Korean Journal of Computational Design and Engineering
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    • v.9 no.4
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    • pp.416-424
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    • 2004
  • In this paper, the heat transfer analysis and thermal stress analysis of the PCB(Printed Circuit Board) equipped in electronic Packages are carried out for various may types of chips on the PCB. And two structural PCB models are used in the analyses. The electronic chips on the PCB usually emit heat and this heat generates the thermal stress around the chip. The thermal load due to the heat generation of chips on the PCB may cause the malfunction of the electronic packages such as a monitor. a computer etc. Hence, the PCB should be designed to withstand these thermal loads. In this paper, the heat transfer analysis and thermal stress analysis are executed for the PCB model with pins and the analysis results are compared with the results for the PCB model without pins. The analysis results show that the PCB model without pins is not good for the thermal stress analysis of PCB, even though these two models have similar heat transfer characteristics. The analysis results also show that the highest thermal stress occurs in the pin especially attached to the highest temperature chip, and the PCB constrained to the electronic package on the long side is structurally more stable than other cases. The analyses of the PCB are executed using the finite element analysis code, NISA.

Analysis of the Resonant Characteristics of a Tonpilz Transducer with a Fixed Tail Mass by the Equivalent Circuit Approach (등가회로를 이용한 후면추 고정형 Tonpilz 트랜스듀서의 공진 특성 해석)

  • Kim, Jin-Wook;Kim, Won-Ho;Joh, Chee-Young;Roh, Yong-Rae
    • The Journal of the Acoustical Society of Korea
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    • v.30 no.6
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    • pp.344-352
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    • 2011
  • In this paper, the resonant characteristic of a Tonpilz transducer with a fixed tail mass has been studied by means of an equivalent circuit approach. An equivalent circuit has been designed to describe the characteristic of a Tonpilz transducer that has an additional resonance because of its fixed tail mass. The transmitting voltage response of the transducer calculated by the designed circuit has been compared with that by the FEA (finite element analysis) to confirm the validity of the circuit. This equivalent circuit approach produces identical results with the FEA, in which the variation of resonant frequencies and TVR has been clearly figured out in relation to the stiffness of the mounting fixture and the mass of the tail mass. The suggested equivalent circuit can be utilized to figure out the characteristics of the Tonpilz transducer more efficiently than FEA that requires much calculation time and revision of the models in accordance with the variation of design variables.

Macromodels for Efficient Analysis of VLSI Interconnects (VLSI 회로연결선의 효율적 해석을 위한 거시 모형)

  • 배종흠;김석윤
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.5
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    • pp.13-26
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    • 1999
  • This paper presents a metric that can guide to optimal circuit models for interconnects among various models, given interconnect parameters and operating environment. To get this goal, we categorize interconnects into RC~c1ass and RLC-c1ass model domains based on the quantitative modeling error analysis using total resistance, inductance and capacitance of interconnects as well as operating frequency. RC~c1ass circuit models, which include most on~chip interconnects, can be efficiently analyzed by using the model~order reduction techniques. RLC-c1ass circuit models are constructed using one of three candidates, ILC(Iterative Ladder Circuit) macromodels, MC(Method of Characteristics) macromodels, and state-based convolution method, the selection process of which is based upon the allowable modeling error and electrical parameters of interconnects. We propose the model domain diagram leading to optimal circuit models and the division of model domains has been achieved considering the simulation cost of macromodels under the environmental assumption of the general purpose circuit simulator such as SPICE. The macromodeling method presented in this paper keeps the passivity of the original interconnects and accordingly guarantees the unconditional stability of circuit models.

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A Simplified Circuit Model and Switching Noise Characterization of the Complicated Multi-Layer IC Package (복잡한다 층구조 IC 패키지의 회로 모델링 및 스위칭 노이즈 분석)

  • 유한종;어영선
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.1049-1052
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    • 1998
  • A new simplified circuit model for the switching noise analysis of the complicated multi-layer IC package is developed. The current flowing mechanism on the ground and power planes of the package is simplified by using the dependent current soures and partial plane circuit model. The methodology is very cost-efficient as well as accurate. It is demonstrated that the nosie based on the simplified circuit model has an excellent agreement with that of the complicated full circuit model. However, the simplified model takes only 5 minutes for the switching noise simulation, while the full circuit model takes more than 4 hours.

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