• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.6
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• pp.35-40
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• 2012

This paper has proposed a 3~5 GHz IR-UWB low power transmitter for range detection application. Proposed transmitter which has been implemented in a $0.13{\mu}m$ CMOS technology is all digital circuit that consist of simple digital logic. this feature insure low complexity and low power consumption. In addition, center frequency can be changed by adopting voltage controlled delay cell for avoiding existing another radio frequency in UWB low band. Proposed circuit consume only 10pJ/b from 1.2 V supply voltage. The simulation results show 3.3~4.3 GHz center frequency controllability, -51 dBm/MHz maximum output power and is satisfied with FCC regulation.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.24 no.5
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• pp.136-144
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• 2010

This paper presents the two-switch interleaved active clamp forward converter, which is mainly composed of two active clamp forward converters. Only two switches are required, and each one is the auxiliary switch for the other. So, the circuit complexity and cost are reduced and control is more simple. An additional resonant inductance is employed to achieve ZVS(Zero-Voltage-Switching) during the dead times. Interleaved output inductor currents diminish the voltage and current ripple. Accordingly, the smaller output filter and capacitors lower the converter volume. This research proposed the Two-switch interleaved Active Clamp Forward Converter characteristic. The principle of operation, feature and design considerations is illustrated and the validity of verified through the experiment with a 160[W] based experimental circuit.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.7
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• pp.784-790
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• 2012

In this paper, an all-digital CMOS ultra-wideband(UWB) pulse generator for high band(6~10 GHz) frequency range is presented. The pulse generator is designed and implemented with extremely low power and low complexity. It is designed to meet the FCC spectral mask requirement by using Gaussian pulse shaping circuit and control the center frequency by using CMOS delay line with shunt capacitor. Measurement results show that the center frequency can be controlled from 4.5 GHz to 7.5 GHz and pulse width is 1.5 ns and pulse amplitude is 310 mV peak to peak at 10 MHz pulse repetition frequency(PRF). The circuit is implemented in 0.13 um CMOS process with a core area of only $182{\times}65um^2$ and dissipates the average power of 11.4 mW at an output buffer with 1.5-V supply voltage. However, the core consumes only 0.26 mW except for output buffer.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.48 no.1
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• pp.63-72
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• 2020

As the design complexity and performances are increased in satellite electronic board, noise related problems are also increased. To minimize the noise issues, various design improvements are performed by power integrity and signal integrity analysis in this research. Static power and dynamic power design are reviewed and improved by DC IR drop and power impedance analysis. Signal integrity design is reviewed and improved by time domain signal wave analysis and PCB(Printed Circuit Board) design modifications. And also power planes resonance modes are checked and mitigation measures are verified by simulation. Finally, it is checked that radiated noise is reduced after design improvements by EMC(Electro Magnetic Compatibility) RE(Radiated Emission) measurement results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.6
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• pp.1056-1063
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• 2008

This paper describes an efficient design of a multi-standard Viterbi decoder that supports multiple constraint lengths and code rates. The Viterbi decoder is parameterized for the code rates 1/2, 1/3 and constraint lengths 7,9, thus it has four operation nodes. In order to achieve low hardware complexity and low power, an efficient architecture based on hardware sharing techniques is devised. Also, the optimization of ACCS (Accumulate-Subtract) circuit for the one-point trace-back algorithm reduces its area by about 35% compared to the full parallel ACCS circuit. The parameterized Viterbi decoder core has 79,818 gates and 25,600 bits memory, and the estimated throughput is about 105 Mbps at 70 MHz clock frequency. Also, the simulation results for BER (Bit Error Rate) performance show that the Viterbi decoder has BER of $10^{-4}$ at $E_b/N_o$ of 3.6 dB when it operates with code rate 1/3 and constraints 7.

• Nuclear Engineering and Technology
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• v.53 no.11
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• pp.3790-3797
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• 2021

Although the individual channel readout method can improve the performance of PET detectors with pixelated photo-sensors, such as silicon photomultiplier (SiPM), this method leads to a significant increase in the number of readout channels. In this study, we proposed a novel multiplexing method that could effectively reduce the number of readout channels to reduce system complexity and development cost. The proposed multiplexing circuit was designed to generate bipolar pulses with different zero-crossing points by adjusting the time constant of the high-pass filter connected to each channel of a pixelated photo-sensor. The channel position of the detected gamma-ray was identified by estimating the width between the rising edge and the zero-crossing point of the bipolar pulse. In order to evaluate the performance of the proposed multiplexing circuit, four detector blocks, each consisting of a 4 × 4 array of 3 mm × 3 mm × 20 mm LYSO and a 4 × 4 SiPM array, were constructed. The average energy resolution was 13.2 ± 1.1% for all 64 crystal pixels and each pixel position was accurately identified. A coincidence timing resolution was 580 ± 12 ps. The experimental results indicated that the novel multiplexing method proposed in this study is able to effectively reduce the number of readout channels while maintaining accurate position identification with good energy and timing performance. In addition, it could be useful for the development of PET systems consisting of a large number of pixelated detectors.

• Journal of Advanced Navigation Technology
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• v.16 no.6
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• pp.893-899
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• 2012

In this paper, a simple design method of stepped septum polarizer suitable for X-band satellite communication is proposed. This method is compared to two other conventional design methods in terms of time consumption and complexity of design procedure. In addition, an equivalent circuit modeling is used to analyze and design for the polarizer based on waveguide. For the validity of satisfying the satellite communication, electrical performances have been verified through the simulation and measurement results.

• Journal of Power Electronics
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• v.14 no.1
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• pp.48-60
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• 2014

Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

• Bulletin of the Korean Chemical Society
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• v.33 no.10
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• pp.3349-3354
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• 2012

Understanding exoelectrogenic reactions of the bioanode is limited due to its complexity and the absence of analytics. Impedance and thermodynamics of bioanode, abiotic anode, and riboflavin-amended anode were evaluated. Activation overpotential of the bioanode was negligible compared with that of the abiotic anode. Impedance spectroscopy shows that the bioanode had much lower charge transfer resistance and higher capacitance than the abiotic anode in low frequency reaction. In high frequency reaction, the impedance parameters, however, were relatively similar between the bioanode and the abiotic anode. At open-circuit impedance spectroscopy, a high frequency arc was not detected in the abiotic anode in Nyquist plot. Addition of riboflavin induced a phase angle shift and created curvature in high-frequency arc of the abiotic anode, and it also drastically changed impedance spectra of the bioanode.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.3
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• pp.164-168
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• 2016

A low insertion-loss, high-isolation switch based on single pole double throw (SPDT) for a 2.4GHz Bluetooth low-energy transceiver is presented in this paper. In order to increase isolation, the body floating technique is implemented. Based on characteristics whereby the ratio of the sizes of the shunt and the series transistors significantly affect the performance of the switches, the device sizes are optimized. A simple matching network is also designed to enhance the insertion loss. Thus, the SPDT switch has high isolation and low insertion loss without increasing the complexity of the circuit. The proposed SPDT is designed and simulated in a complementary metal-oxide semiconductor 65nm process. The switch has a $530{\mu}m{\times}270{\mu}m$ area and achieves 0.9dB, 1.78dB insertion loss and 40dB, 41dB isolation of transmission, reception modes, respectively.