• 제목/요약/키워드: Chip on chip technology

검색결과 1,636건 처리시간 0.031초

CMOS 일체형 미세 기계전자시스템을 위한 집적화 공정 개발 (Chip-scale Integration Technique for a Microelectromechnical System on a CMOS Circuit)

  • 이호철
    • 한국정밀공학회지
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    • 제20권5호
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    • pp.218-224
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    • 2003
  • This paper describes a novel MEMS integration technique on a CMOS chip. MEMS integration on CMOS circuit has many advantages in view of manufacturing cost and reliability. The surface topography of a CMOS chip from a commercial foundry has 0.9 ${\mu}{\textrm}{m}$ bumps due to the conformal coating on aluminum interconnect patterns, which are used for addressing each MEMS element individually. Therefore, it is necessary to achieve a flat mirror-like CMOS chip fer the microelectromechanical system (MEMS) such as micro mirror array. Such CMOS chip needs an additional thickness of the dielectric passivation layer to ease the subsequent planarization process. To overcome a temperature limit from the aluminum thermal degradation, this study uses RF sputtering of silicon nitride at low temperature and then polishes the CMOS chip together with the surrounding dummy pieces to define a polishing plane. Planarization reduces 0.9 ${\mu}{\textrm}{m}$ of the bumps to less than 25 nm.

미세피치 Sn-In 솔더범프를 이용한 COG(Chip on Glass) 본딩공정 및 전기적 특성 (Processing and Electrical Properties of COG(Chip on Glass) Bonding Using Fine-pitch Sn-In Solder Bumps)

  • 최재훈;전성우;정부양;오태성;김영호
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 기술심포지움 논문집
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    • pp.103-105
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    • 2003
  • COG (Chip on Glass) technology using solder bump reflow has been investigated to attach IC chip directly on glass substrate of LCD panel. As It chip and LCD panel have to be heated to reflow temperature of the so]der bumps for COG bonding, it is necessary to use low-temperature solders to prevent the damage of liquid crystals of LCD panel. In this study, using the Sn-52In solder bumps of $40{\mu}m$ pitch size, solder joints between Si chip and glass substrate were made at temperature below $150^{\circ}C$. The contact resistance of the solder joint was $8.58m\Omega$, which was much lower than that of the joint made using the conventional ACF bonding technique. The Sn-52In solder joints with underfill showed excellent reliability at a hot humid environment.

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Influence of Microbial Activity on the Long-Term Alteration of Compacted Bentonite/Metal Chip Blocks

  • Lee, Seung Yeop;Lee, Jae-Kwang;Kwon, Jang-Soon
    • 방사성폐기물학회지
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    • 제19권4호
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    • pp.469-477
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    • 2021
  • Safe storage of spent nuclear fuel in deep underground repositories necessitates an understanding of the long-term alteration of metal canisters and buffer materials. A small-scale laboratory alteration test was performed on metal (Cu or Fe) chips embedded in compacted bentonite blocks placed in anaerobic water for 1 year. Lactate, sulfate, and bacteria were separately added to the water to promote biochemical reactions in the system. The bentonite blocks immersed in the water were dismantled after 1 year, showing that their alteration was insignificant. However, the Cu chip exhibited some microscopic etch pits on its surface, wherein a slight sulfur component was detected. Overall, the Fe chip was more corroded than the Cu chip under the same conditions. The secondary phase of the Fe chip was locally found as carbonate materials, such as siderite (FeCO3) and calcite ((Ca, Fe)CO3). These secondary products can imply that the local carbonate occurrence on the Fe chip may be initiated and developed by an evolution (alteration) of bentonite and a diffusive provision of biogenic CO2 gas. These laboratory scale results suggest that the actual long-term alteration of metal canisters/bentonite blocks in the engineered barrier could be possible by microbial activities.

칩마운터 구조물의 유연성을 고려한 위치와 진동 동시 제어 (Simultaneous Positioning and Vibration Control of Chip Mounter with Structural Flexibility)

  • 강민식
    • 반도체디스플레이기술학회지
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    • 제12권1호
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    • pp.53-59
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    • 2013
  • Chip mounter which is used to pick chips from the pre-specified position and place them on the target location of PCB is an essential device in semiconductor and LCD industries. Quick and high precision positioning is the key technology needed to increase productivity of chip mounters. As increasing acceleration and deceleration of placing motion, structural vibration induced from inertial reactive force and flexibility of mounter structure becomes a serious problem degrading positioning accuracy. Motivated from these, this paper proposed a new control design algorithm which combines a mounter structure acceleration feedforward compensation and an extended sliding mode control for fine positioning and suppression of structural vibration, simultaneously. The feasibility of the proposed control design was verified along with some simulation results.

미소전극어레이형 DNA칩을 이용한 유전자의 전기화학적 검출 (Eletrochemical Detection of Gene using Microelectrode-array DNA Chip)

  • 최용성;권영수;;박대희
    • 한국전기전자재료학회논문지
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    • 제17권7호
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    • pp.729-737
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    • 2004
  • In this paper, a DNA chip with a microelectrode array was fabricated using microfabrication technology. Several probe DNAs consisting of mercaptohexyl moiety at their 5 end were immobilized on the gold electrodes by DNA arrayer. Then target DNAs were hybridized and reacted with Hoechst 33258, which is a DNA minor groove binder and electrochemically active dye. Linear sweep voltammetry or cyclic voltammetry showed a difference between target DNA and control DNA in the anodic peak current values. It was derived from Hoechst 33258 concentrated at the electrode surface through association with formed hybrid. It suggested that this DNA chip could recognize the sequence specific genes.

미소유체 칩 상에서 Quantum Dot 및 마이크로 비드를 이용한 생체물질 분석 (Microbead-based bio-assay using quantum dot fluorescence in a microfluidic chip)

  • 윤광석;이도훈;김학성;윤의식
    • 센서학회지
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    • 제14권5호
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    • pp.308-312
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    • 2005
  • We present a microfluidic chip designed for the detection of antibody by using quantum dots fluorescence and a microbead-based assay. A custom designed PDMS microfluidic chip with multi-layer channel is utilized for capturing microbeads; antibody injection into each micro-well; QD injection; and fluorescence detection. The experiment using the fabricated microfluidic chip has been performed on solutions with various concentrations of antibody and has shown correlated fluorescent intensities.

플렉시블 전자기기 응용을 위한 미세 솔더 범프 접합부에 관한 연구 (Study on Joint of Micro Solder Bump for Application of Flexible Electronics)

  • 고용호;김민수;김택수;방정환;이창우
    • Journal of Welding and Joining
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    • 제31권3호
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    • pp.4-10
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    • 2013
  • In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

Multilayer thin Film technology as an Enabling technology for System-in-Package (SIP) and "Above-IC" Processing

  • Beyne, Eric
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2003년도 International Symposium
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    • pp.93-100
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    • 2003
  • The continuing scaling trend in microelectronic circuit technology has a significant impact on the different IC interconnection and packaging technologies. These latter technologies have not kept pace with the IC scaling trends, resulting in a so-called“interconnect technology gap”. Multilayer thin film technology is proposed as a“bridge”- technology between the very high density IC technology and the coarse standard PCB technology. It is also a key enabling technology for the realisation of true“System-in-a-Package”(SIP) solutions, combining multiple“System-on-a-Chip”(SOC) IC's with other components and also integrating passive components in its layers. A further step is to use this technology to realise new functionalities on top of active wafers. These additional“above-IC”processed layers may e.g. be used for low loss, high speed on chip interconnects, clock distribution circuits, efficient power/ground distribution and to realize high Q inductors on chip.

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플립칩용 에폭시 접착제의 저온 속경화 거동에 미치는 경화제의 영향 (Effects of Hardeners on the Low-Temperature Snap Cure Behaviors of Epoxy Adhesives for Flip Chip Bonding)

  • 최원정;유세훈;이효수;김목순;김준기
    • 한국재료학회지
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    • 제22권9호
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    • pp.454-458
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    • 2012
  • Various adhesive materials are used in flip chip packaging for electrical interconnection and structural reinforcement. In cases of COF(chip on film) packages, low temperature bonding adhesive is currently needed for the utilization of low thermal resistance substrate films, such as PEN(polyethylene naphthalate) and PET(polyethylene terephthalate). In this study, the effects of anhydride and dihydrazide hardeners on the low-temperature snap cure behavior of epoxy based non-conductive pastes(NCPs) were investigated to reduce flip chip bonding temperature. Dynamic DSC(differential scanning calorimetry) and isothermal DEA(dielectric analysis) results showed that the curing rate of MHHPA(hexahydro-4-methylphthalic anhydride) at $160^{\circ}C$ was faster than that of ADH(adipic dihydrazide) when considering the onset and peak curing temperatures. In a die shear test performed after flip chip bonding, however, ADH-containing formulations indicated faster trends in reaching saturated bond strength values due to the post curing effect. More enhanced HAST(highly accelerated stress test) reliability could be achieved in an assembly having a higher initial bond strength and, thus, MHHPA is considered to be a more effective hardener than ADH for low temperature snap cure NCPs.

플라스틱칩 결체(結締) 톱밥보드의 기계적(機械的) 및 물리적(物理的) 성질(性質)에 관(關)한 연구(硏究) (A Study on the Mechanical and Physical Properties of Sawdustboard combined with Plastic Chip)

  • 이필우;서진석
    • Journal of the Korean Wood Science and Technology
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    • 제15권3호
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    • pp.44-55
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    • 1987
  • In order to study the effect of sawdustboard combined with plastic chips, 0.5mm($T_1$), 1mm($T_2$), 1.4mm($T_3$) thick nylon fiber. polypropylene rope fiber(RP), and 0.23mm thick moth-proof polypropylene net fiber(NP) were cut into 0.5, 1, 2cm long plastic chips. Thereafter, sawdustboard combined with plastic chips prepared as the above and plastic non-combined sawdustboard(control) were manufactured into 3 types of one-, two-, and three layer with 5 or 10% combination level. By the discussions and results at this study, the significant conclusions of mechanical and physical properties were summarized as follows: 1. The MORs were shown in the order of 3 layer> 2 layer> 1 layer among plastic non-combined boards, and $T_3$ < $T_2$ < $T_1$ < RP (NP(5%) < NP(l0%) among plastic combined boards. In 2cm long plastic chip in 1 layer board, the highest strength through all the composition was recognized. 1 layer board showing the lower strength with 0.5cm plastic chip rendered to the bending strength improvement by 2 or 3 layer board composition. On the other hand, 2 or 3 layer combined with 1, 2cm long polypropylene net fiber chips incurred MOR's conspicuous decrease requiring optimum plastic chip combined level and consideration to combined type. 2. MOE in plastic non-combined 3 layer board exhibited sandwich construction effect by higher resin content application to surface layer in the order of 3layer>1layer>2layer with the highest stiffness of the board combined with polypropylene chip, while nylon chip-combined board had little difference from plastic non-combined board. In relevant to length and layer effect, 3 layer board combined with the 0.5cm long polypropylene net fiber chip in 5% and 10% combined level presented 34-43% and 44-76% stiffness increase against plastic non-combined board(control), respectively. Moreover, in 1 layer board, 30% stiffness increase with 10% against 5% combined level in the 1 and 2cm long polypropylene net fiber chip was obtained. 3. Stress at proportional limit(Spl) showing the fiber relationship (r: 0.81-0.97) between MOR presented in the order of 1 layer<2 layer<3 layer in plastic non-combined board. Correspondingly, combined effect by layer and plastic chip length was similar to MOR's. 4. Differently from previous properties(MOR, MOE, Spl). work to maximum load(Wml) of 2 layer board approached to that of 3 layer board. Conforming the above phenomenon. 2 layer combined with 0.5cm long polypropylene net fiber chip kept the greater work than 1 layer. The polypropylene combined board superior to nylon -and plastic non - combined board seemed to have greater anti - failing capacity. 5. Internal bond strength(IB), in contrast to MOR's tendency. showed in the order of T1

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