• 제목/요약/키워드: Bias-stress

검색결과 291건 처리시간 0.036초

Two-Bit/Cell NFGM Devices for High-Density NOR Flash Memory

  • Lee, Jong-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권1호
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    • pp.11-20
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    • 2008
  • The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.

Reliability Characteristics of La-doped High-k/Metal Gate nMOSFETs

  • Kang, C.Y.;Choi, R.;Lee, B.H.;Jammy, R.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제9권3호
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    • pp.166-173
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    • 2009
  • The reliability of hafnium oxide gate dielectrics incorporating lanthanum (La) is investigated. nMOSFETs with metal/La-doped high-k dielectric stack show lower $V_{th}$ and $I_{gate}$, which is attributed to the dipole formation at the high-k/$SiO_2$ interface. The reliability results well correlate with the dipole model. Due to lower trapping efficiency, the La-doping of the high-k gate stacks can provide better PBTI immunity, as well as lower charge trapping compared to the control HfSiO stacks. While the devices with La show better immunity to positive bias temperature instability (PBTI) under normal operating conditions, the threshold voltage shift (${\Delta}V_{th}$) at high field PBTI is significant. The results of a transconductance shift (${\Delta}G_m$) that traps are easily generated during high field stress because the La weakens atomic bonding in the interface layer.

New strut-and-tie-models for shear strength prediction and design of RC deep beams

  • Chetchotisak, Panatchai;Teerawong, Jaruek;Yindeesuk, Sukit;Song, Junho
    • Computers and Concrete
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    • 제14권1호
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    • pp.19-40
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    • 2014
  • Reinforced concrete deep beams are structural beams with low shear span-to-depth ratio, and hence in which the strain distribution is significantly nonlinear and the conventional beam theory is not applicable. A strut-and-tie model is considered one of the most rational and simplest methods available for shear strength prediction and design of deep beams. The strut-and-tie model approach describes the shear failure of a deep beam using diagonal strut and truss mechanism: The diagonal strut mechanism represents compression stress fields that develop in the concrete web between diagonal cracks of the concrete while the truss mechanism accounts for the contributions of the horizontal and vertical web reinforcements. Based on a database of 406 experimental observations, this paper proposes a new strut-and-tie-model for accurate prediction of shear strength of reinforced concrete deep beams, and further improves the model by correcting the bias and quantifying the scatter using a Bayesian parameter estimation method. Seven existing deterministic models from design codes and the literature are compared with the proposed method. Finally, a limit-state design formula and the corresponding reduction factor are developed for the proposed strut-andtie model.

간호사간 직장 내 괴롭힘 관련변인에 대한 체계적 문헌고찰과 메타분석 (The Related Factors to Workplace Bullying in Nursing: A Systematic Review and Meta-analysis)

  • 강지연;이민주
    • 성인간호학회지
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    • 제28권4호
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    • pp.399-414
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    • 2016
  • Purpose: The purpose of this study was to review and identify factors relevant to workplace bullying in nursing. Methods: Twenty-three studies that met the criteria were selected from a sample of twenty-six studies. These articles were retrieved from a central literature databases (N=13,241). The total correlational effect size (ESr) for each related factor was calculated from Fisher's Zr. A funnel plot inspection (similar to scatter plot) with a trim-and-fill method was used to assess the publication bias of the meta-analyzed studies. Results: From the systematic review, fifty-one factors were identified as having an influencing effect. Fourteen factors (five individual and nine organizational factors) were eligible for meta-analysis. The individual factors included, self-esteem (ESr=-.31), psychological capital (ESr=-.26), and marital status (ESr=-.06) which were significantly correlated with workplace bullying. Organizational factors included, organizational tolerance (ESr=.48), supervisor incivility (ESr=.47), job stress (ESr=.46), group morale (ESr=-.36), group support (ESr=-.35), supervisor leadership (ESr=-.35), group identity (ESr=-.33), and structural empowerment (ESr=-.27). These factors were significantly correlated with workplace bullying. There were no publication biases except for both individual and organizational factors. Conclusion: Organizational factors have more of an greater impact than individual factors on workplace bullying. The results of this study support the need for intervention at the organizational level.

확률적 피로한도모형하에서 계단형 피로시험의 설계 (Design of the Staircase Fatigue Tests for the Random Fatigue Limit Model)

  • 서순근;박정은;조유희;송서일
    • 품질경영학회지
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    • 제35권3호
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    • pp.107-117
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    • 2007
  • The fatigue has been considered the most failure mode of metal, ceramic, and composite materials. In this paper, numerical experiments to asses the usefulness of two Dixon's methods(small and large samples) and 14 S-N methods on assumptions of lognormal fatigue limit distribution under RFL(Random Fatigue Limit) model are conducted for staircase(or up-and-down) test and compared by MSE(Mean Squared Error) and bias for estimates of mean log-fatigue limit. Also, guidelines for staircase test plans to choose initial stress level and step size are recommended from numerical experiments including sensitivity analyses. In addition, the parametric bootstrap method to construct a confidence interval for the mean of log-fatigue limit by the percentile method using a transition probability matrix of Markov chain is presented and illustrated with an example.

Low voltage stability of a-Si:H TFTs with $SiN_x$ dielectric films prepared by PECVD using Taguchi methods

  • Wu, Chuan-Yi;Sun, Kuo-Sheng;Cho, Shih-Chieh;Lin, Hong-Ming
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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    • pp.272-275
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    • 2005
  • The high stability of a-Si:H TFTs device is studied with different deposited conditions of $SiN_x$ films by PECVD. The process parameters of $N_2$, $NH_3$ gas flow rate, RF power, and pressure s of hydrogenated amorphous silicon nitride are taken into account and analyzed by Taguchi experimental design method. The $NH_3$ gas flow rate and RF power are two major factors on the average threshold voltage and the a-SiNx:H film's structure. The hydrogen contents in $SiN_x$ films were measured by FTIR using the related Si-H/N-H bonds ratio in $a-SiN_x:H$ films. After the 330,000 sec gate bias stress is applied, the threshold voltages ($V_th$) shift less than 10%. This result indicates that the highly stable a-Si:H TFTs device can be fabricated with optimum gate $SiN_x$ insulator.

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Polymer semiconductor based transistors for flexible display

  • 이지열;이방린;김주영;정지영;박정일;정종원;구본원;진용완
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2012년도 춘계학술발표대회
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    • pp.59.1-59.1
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    • 2012
  • Organic thin-film transistors (OTFTs) with printable semiconductors are promising candidate devices for flexible active-matrix (AM) display applications. Yet, stable operation of actual display panels driven by OTFTs has seldom been reported up to date. Here, we demonstrate a flexible reflective type polymer dispersed liquid crystal (PDLC) display, in which inkjet-printed OTFT arrays are used as driving elements with excellent areal uniformity in terms of device performance. As the active semiconductor, a novel, ambient processable conjugated copolymer was synthesized. The stability of the devices with respect to electrical bias stress was improved by applying a channel-passivation layer, which suppresses the environmental effects and hence reduces the density of trap states at the channel/dielectric interface. The combination of high performance and high stability OTFT devices enabled the successful realization of stable operating flexible color-displays by inkjet-printing.

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서로 다른 소스/드레인 전극물질을 이용한 비정질 In-Ga-Zn-O 박막트랜지스터 성능향상 (Performance Improvement of Amorphous In-Ga-Zn-O Thin-film Transistors Using Different Source/drain Electrode Materials)

  • 김승태;조원주
    • 한국전기전자재료학회논문지
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    • 제29권2호
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    • pp.69-74
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    • 2016
  • In this study, we proposed an a-IGZO (amorphous In-Ga-Zn-O) TFT (thin-film transistor) with off-planed source/drain structure. Furthermore, two different electrode materials (ITO and Ti) were applied to the source and drain contacts for performance improvement of a-IGZO TFTs. When the ITO with a large work-function and the Ti with a small work-function are applied to drain electrode and source contact, respectively, the electrical performances of a-IGZO TFTs were improved; an increased driving current, a decreased leakage current, a high on-off current ratio, and a reduced subthreshold swing. As a result of gate bias stress test at various temperatures, the off-planed S/D a-IGZO TFTs showed a degradation mechanism due to electron trapping and both devices with ITO-drain or Ti-drain electrode revealed an equivalent instability.

a-Si TFT Integrated Gate Driver Using Multi-thread Driving

  • Jang, Yong-Ho;Yoon, Soo-Young;Park, Kwon-Shik;Kim, Hae-Yeol;Kim, Binn;Chun, Min-Doo;Cho, Hyung-Nyuck;Choi, Seung-Chan;Moon, Tae-Woong;Ryoo, Chang-Il;Cho, Nam-Wook;Jo, Sung-Hak;Kim, Chang-Dong;Chung, In-Jae
    • Journal of Information Display
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    • 제7권3호
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    • pp.5-8
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    • 2006
  • A novel a-Si TFT integrated gate driver circuit using multi-thread driving has been developed. The circuit consists of two independent shift registers alternating between the two modes, "wake" and "sleep". The degradation of the circuit is retarded because the bias stress is removed during the sleep mode. It has been successfully integrated in 14.1-in. XGA LCD Panel, showing enhanced stability.

Deposition of Cu-Ni films by Magnetron Co-Sputtering and Effects of Target Configurations on Film Properties

  • Seo, Soo-Hyung;Park, Chang-Kyun;Kim, Young-Ho;Park, Jin-Seok
    • KIEE International Transactions on Electrophysics and Applications
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    • 제3C권1호
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    • pp.23-27
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    • 2003
  • Structural properties of Cu-Ni alloy films, such as preferred orientation, crystallite size, in-ter-planar spacing, cross-sectional morphology, and electrical resistivity, are investigated in terms of tar-get configurations that are used in the film deposition by means of magnetron co-sputtering. Two different target configurations are considered in this study: a dual-type configuration in which two separate tar-gets (Cu and Ni) and different bias types (RF and DC) are used and a Ni-on-Cu type configuration in which Ni chips are attached to a Cu target. The dual-type configuration appears to have some advantages over the Ni-on-Cu type regarding the accurate control of atomic composition of the deposited Cu-Ni alloy. However, the dual-type-produced film exhibits a porous and columnar structure, the relatively large internal stress, and the high electrical resistivity, which are mainly due to the relatively low mobility of adatoms. The affects of thermal treatment and deposition conditions on the structural and electrical properties of dual-type Cu-Ni films are also discussed.