• Journal of the Korean Ceramic Society
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• v.29 no.1
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• pp.29-34
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• 1992

Phase transition, dielectric properties, and leakage current characteristics of Ta2O5 thin film fabricated by sol-gel process with tantalum penta-n-butoxide were studied as a function of annealing temperature in O2 atmoshpere. Although Ta2O5 thin film annealed at temperatures below 700$^{\circ}C$ for 1 hr was amorphous, it was crystallized to ${\beta}$-Ta2O5 of orthorhombic phase by annealing at temperatures higher than 750$^{\circ}C$. With increasing annealing temperature from 500$^{\circ}C$ to 900$^{\circ}C$, dielectric constant of sol-gel processed Ta2O5 thin film was changed from 17.6 to 15.3 due to the increase of SiO2 thickness at Ta2O5/Si interface. For Ta2O5 thin film annealed at 500$^{\circ}C$ to 800$^{\circ}C$ for 1 hr in O2 atmosphere, leakage current was remarkably reduced and breakdown strength was increased with higher annealing temperature. For Ta2O5 film annealed at 800$^{\circ}C$, breakdown did not occur even at electric field strength of 30${\times}$105V/cm and leakage current was maintained lower than 10-8A/$\textrm{cm}^2$.

• Korean Journal of Materials Research
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• v.17 no.4
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• pp.222-226
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• 2007

[ $SiO_2$ ]thin films containing Si-nanocrystals and $Er^{3+}$ were fabricated by the RF-sputtering method. Intense emission of $Er^{3+}$ was observed at 1530 nm region after the annealing of the film at $1050^{circ}C$ for 5 min. Channel waveguides were fabricated using such films for the core. The films containing Si higher than 2.4 at% exhibited the change in stress from compression to tension after annealing, which induced the fatal loss-increase in waveguide. The optical gain might be attained by the Er-doped waveguide with Si lower than 2.4 at% by a visible-light-excitation.

• Korean Journal of Materials Research
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• v.14 no.12
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• pp.829-834
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• 2004

Annealing of $Cu(B)/Ti/SiO_2$ in vacuum has been carried out to investigate the effects of Ti underlayer on microstructure in $Cu(B)/Ti/SiO_2$ structures. For comparison, $Cu(B)/Ti/SiO_2$ structures was also annealed in vacuum. Three different temperature dependence of Cu growth can be seen in $Cu(B)/Ti/SiO_2$; B precipitates- pinned grain growth, abnormal grain growth, normal grain growth. The Ti underlayer having a strong affinity for B atoms reacts with the out-diffused B to the Ti surface and forms titanium boride at the Cu-Ti interface. The formation of titanium boride acts as a sink for the out-diffusion of B atoms. The depletion of boron in grain boundaries of Cu films, as results of the rapid diffusion of B along the grain boundaries and the insufficient segregation of B to the grain boundaries, induces grain boundaries to migrate and causes the abnormal grain growth. The increased bulk diffusion coefficient of B within Cu grains can be responsible for the normal grain growth occurring in the annealed $Cu(B)/Ti/SiO_2\;at\;600^{\circ}C$. In contrast, the $Cu/SiO_2$ structures show only the abnormal growth of grains and their sizes increasing as the temperature increases above $400^{\circ}C$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.897-900
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• 2000

Annealing dependencies of the fatigue properties of SrBi$_2$Ta$_2$$O_{9}$ thin films were observed as function of substrate temperature(400-50$0^{\circ}C$) by the rf magnetron sputtering method. With increasing annealing temperature from $600^{\circ}C$ to 85$0^{\circ}C$, flourite phase was crystalized to $650^{\circ}C$ and Bi-layered perovskite phase was crystalized above $700^{\circ}C$. The fatigue characteristics of SBT thin films deposited on Pt/TiO$_2$/SiO$_2$/Si substrate did not change up to 101o switching cycles.s.

• Korean Journal of Materials Research
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• v.12 no.6
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• pp.508-512
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• 2002

$2000{\AA}-SiO_2/Si(100)$ and $560{\AA}-Si_3N_4/Si(100)$ wafers, which are 10 cm in diameter, were directly bonded using a rapid thermal annealing method. We fixed the anneal time of 30 second and varied the anneal temperatures from 600 to $1200^{\circ}C$. The bond strength of bonded wafer pairs at given anneal temperature were evaluated by a razor blade crack opening method and a four-point bonding method, respectively. The results clearly slow that the four-point bending method is more suitable for evaluating the small bond strength of 80~430 mJ/$\m^2$ compared to the razor blade crack opening method, which shows no anneal temperature dependence in small bond strength.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.90-90
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• 2009

The $Sr_{0.7}Bi_{2.3}Nb_2O_9$(SBN) thin films are deposited on Pt-coated electrode($Pt/Ti.SiO_2/Si$) using RF sputtering method. The dielectric constant of SBN thin films were increased with the increase of annealing temperature. The maximum dielectric constant of SBN thin film is obtained by annealing at 700[$^{\circ}C$]. The dielectric constant and dielectric loss had a stable value within -5~+5[V].

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.64.2-65
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• 2003

A 4 nm layer of ZrOx (targeted x-2) was deposited on an interfacial layer(IL) of native oxide (SiO, t∼1.2 nm) surface on 200 mm Si wafers by a manufacturable atomic layer chemical vapor deposition technique at 30$0^{\circ}C$. Some as-deposited layers were subjected to a post-deposition, rapid thermal annealing at $700^{\circ}C$ for 5 min in flowing oxygen at atmospheric pressure. The experimental x-ray diffraction, x-ray photoelectron spectroscopy, high-resolution transmission electron microscopy, and high-resolution parallel electron energy loss spectroscopy results showed that a multiphase and heterogeneous structure evolved, which we call the Zr-O/IL/Si stack. The as-deposited Zr-O layer was amorphous $ZrO_2$-rich Zr silicate containing about 15% by volume of embedded $ZrO_2$ nanocrystals, which transformed to a glass nanoceramic (with over 90% by volume of predominantly tetragonal-$ZrO_2$(t-$ZrO_2$) and monoclinic-$ZrO_2$(m-$ZrO_2$) nanocrystals) upon annealing. The formation of disordered amorphous regions within some of the nanocrystals, as well as crystalline regions with defects, probably gave rise to lattice strains and deformations. The interfacial layer (IL) was partitioned into an upper Si $o_2$-rich Zr silicate and the lower $SiO_{x}$. The latter was sub-toichiometric and the average oxidation state increased from Si0.86$^{＋}$ in $SiO_{0.43}$ (as-deposited) to Si1.32$^{＋}$ in $SiO_{0.66}$ (annealed). This high oxygen deficiency in $SiO_{x}$ indicative of the low mobility of oxidizing specie in the Zr-O layer. The stacks were characterized for their dielectric properties in the Pt/{Zr-O/IL}/Si metal oxide-semiconductor capacitor(MOSCAP) configuration. The measured equivalent oxide thickness (EOT) was not consistent with the calculated EOT using a bilayer model of $ZrO_2$ and $SiO_2$, and the capacitance in accumulation (and therefore, EOT and kZr-O) was frequency dispersive, trends well documented in literature. This behavior is qualitatively explained in terms of the multi-layer nanostructure and nanochemistry that evolves.ves.ves.

• Applied Science and Convergence Technology
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• v.23 no.1
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• pp.40-43
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• 2014

We investigated the growth characteristics and interfacial properties of $HfO_2$ films deposited on Ge substrate through atomic layer deposited (ALD) by using an in-situ medium energy ion scattering analysis. The growth kinetics of $HfO_2$ grown on a $GeO_2/Ge$ substrate through ALD is similar to that grown on an $SiO_2/Si$ substrate. However, the incubation period of $HfO_2$ deposition on Ge is shorter than that on Si. The $HfO_2$ grown on the GeO/Ge substrate shows a significant diffusion of Hf atoms into the substrate interface and GeO volatilization after annealing at $700^{\circ}C$. The presence of low-quality Ge oxide or suboxide may degrade the electrical performance of device.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.8
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• pp.34-41
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• 1993

Effect of high temperature annealing conditions on Ta$_{2}O_{5}$ thin films was investigated. Ta$_{2}O_{5}$ thin films were deposited on P-type silicon substrates by plasma-enhanced chemical vapor deposition (PECVD) using tantalum ethylate. Ta(C$_{2}H_{5}O)_{5}$, and nitrous oxide. N$_{2}$O. The microstructure changed from amorphous to polycrystalline above 700.deg. C annealing temperature. The refractive index, dielectric onstant and leakage current of the film increased as annealing temperature increased. However, annealing in oxygen ambient reduced leakage currents and dielectric constant due to the formation of interfacial SiO$_{2}$ layer. By optimizing annealing temperature and ambient, leakage current lower than 10$^{-8}$ A/cm$^{2}$ and maximum capacitance of 9 fF/${\mu}m^{2}$ could be obtained.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.265-270
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• 2017

4H-SiC has attracted attention for high-power and high-temperature metal-oxide-semiconductor field-effect transistors (MOSFETs) for industrial and automotive applications. The gate oxide in the 4H-SiC MOS system is important for switching operations. Above $1000^{\circ}C$, thermal oxidation initiates $SiO_2$ layer formation on SiC; this is one advantage of 4H-SiC compared with other wide band-gap materials. However, if post-deposition annealing is not applied, thermally grown $SiO_2$ on 4H-SiC is limited by high oxide charges due to carbon clusters at the $SiC/SiO_2$ interface and near-interface states in $SiO_2$; this can be resolved via low-temperature deposition. In this study, low-temperature $SiO_2$ deposition on a Si substrate was optimized for $SiO_2/4H-SiC$ MOS capacitor fabrication; oxide formation proceeded without the need for post-deposition annealing. The $SiO_2/4H-SiC$ MOS capacitor samples demonstrated stable capacitance-voltage (C-V) characteristics, low voltage hysteresis, and a high breakdown field. Optimization of the treatment process is expected to further decrease the effective oxide charge density.