• 한국전산유체공학회:학술대회논문집
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• 한국전산유체공학회 2004년도 춘계 학술대회논문집
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• pp.56-61
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• 2004

As the size and dimension of target problems in the field of computational engineering including CFD gets bigger and higher, it is needed to have more efficient and flexible data visualization environment in terms of software and hardware. Even though it is still manageable to use a mouse in controlling 3-dimensional data visualization, it would be beneficial to use 3-D input device for 3-D visualization. 'Data Glove' is one of the best 3-D input devices, because human hands are best tools understanding 3-D space. Signals coming from 'Data Glove' are analog and very sensitive to finger motions, so we decided to use a digital filter. This paper describes our experience and benefits of using data glove in controlling 3-Dimensional Postprocess Software.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.163-165
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• 2003

Over the past several years, the application extent of the real-time systems is being expanded with the progress of civilization. An effort to minimize power consumption at the system is being accomplished in several fields from the design of an analog/digital circuit up to the device level Things of this effort have included the power optimum-technique to minimize power consumption at the digital logic circuit and the dynamic managed skill by means o( the decision of the operating system. In this paper, we designed of low power system by using Power-optimized method. As an effective low-power design, we designed the low power system which it has a monitoring system within the main board and a personal computer.

• Journal of Electrical Engineering and Technology
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• 제6권6호
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• pp.824-828
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• 2011

Transmission line analysis of the surface a cumulation layer in injection-enhanced gate transistor (IEGT) is presented for the first time, based on per-unit-length resistance and conductance of the surface layer beneath the gate of IEGT. Lateral electric field on the accumulation layer surface, as well as the electron current injected into the accumulation layer, is governed by the well-known wave equation, and decreases as an exponential function of the lateral distance from the cathode. Unit-length resistance and conductance of the layer are expressed in terms of the device parameters and the applied gate voltage. Results obtained from the experiments are consistent with the numerical simulations.

• 한국조명전기설비학회지:조명전기설비
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• 제10권3호
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• pp.64-70
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• 1996

본 논문은 배전선로의 정상 및 비 정상상태의 전류를 감시하기 위해 싱글 칩 마이크로세서를 이용하여 저가격의 Data Logger를 구현하였다. 수집된 데이터는 내장된 A/D변환기에 의해 디지털화된 후 RAM Card에 저장된다. 저장된 데이터는 직렬 통신 및 별동의 RAM Card Driver를 통해 병렬로 퍼스널 컴퓨터로 전송할 수 있도록 하였다. 수집된 데이터는 퍼스널 컴퓨터상에 디스플레이가 되도록 하였으며 분석할 수 있도록 하였다.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2007년도 학술대회
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• pp.89-91
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• 2007

Multimedia service based on interactivity, personalization, multiple channels and community distinguishes IPTV from incumbent TV. But data encoding/decoding time and image frame processing should be considered in digital TV versus analog device. Especially channel zapping time is one of the most important parameters for the service quality of IPTV. This paper proposes the mechanism for decreasing the channel zapping time with multiple decoder and image frame processing. We also implemented the multi-group video community service system using IP multicasting function supporting interactive learning service.

• Transactions on Electrical and Electronic Materials
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• 제14권6호
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• pp.304-307
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• 2013

Reverse engineering of semiconductor devices utilizes delayering processes, in order to identify how the interconnection lines are stacked over transistor gates. Cu metal has been used in recent fabrication technologies, and de-processes becomes more difficult with the shrinking device dimensions. In this article, reverse engineering technologies to reveal the Cu interconnection lines and Cu via-plugs embedded in dielectric layers are investigated. Stacked dielectric layers are removed by $CF_4$ plasma etching, then the exposed planar Cu metal lines and via-plugs are selectively delineated by wet chemical solution, instead of the commonly used plasma-based dry etch. As a result, we have been successful in extracting the layouts of multiple layers within a system IC, and this technique can be applicable to other logic IC, analog IC, and CMOS IC, etc.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.878-882
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• 2004

Position controls are very important in semiconductor manufacturing devices, machine tools precision measuring instruments, etc. In this paper, a novel encoder of digital and analog hybrid type is proposed. It is shown that from this experiment a high-resolution angle measurement device can be designed by a low cost incremental encoder.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.219-223
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• 2004

Since rotor position information is necessary to drive the SRM, absolute-encoder, resolver and incremental encoder is used to detect a rotor position. But, it is not desirable to use a high price encoder and microprocessor under the condition of the simple driving system when precision control is not demanded. In this paper, only using the reflective type two photo-sensors replaces the conventional opto-interrupter and slotted-disk, which not only remove a slotted-disk section but drive three-phase 6/4 pole SRM bidirectionally, Therefore, control circuit can compose common analog device with low price.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년 학술대회 논문집 정보 및 제어부문
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• pp.606-608
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• 2006

This paper describes a 8bit 10MS/s low power pipelined analog-to-digital converter(ADC). To reduce power consumption in proposed ADC, a high gain op-amp that consumes large power in MDAC(multiplying DAC) of conventional pipelined ADC is replaced with simple comparator and current sources. Moreover, differential charge transfer amplifier technique with latch in the sub-ADC reduces the power consumption to less than half compared with the conventional sub-ADC which use high speed comparator. The proposed ADC shows the power consumption of 1.8mW at supply voltage of 1.8V. This proposed ADC is suitable to apply to the portable display device. The circuit was implemented with 0.18um CMOS technology and the core size of circuit is 2.5mm${\times}$1mm.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1243-1246
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• 2006

A new source follower circuit for the integrated circuit of AMLCDs is proposed. Active load is added and calibration operation is applied to compensate the circuits. Proposed circuit is capable of minimizing the variation from both timing and device variations through measured results, the uniformity and bias effect are discussed.