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http://dx.doi.org/10.5370/JEET.2011.6.6.824

Transmission Line Analysis of Accumulation Layer in IEGT  

Moon, Jin-Woo (PTD_Korea, Analog Technology Development, Fairchild Semiconductor)
Chung, Sang-Koo (School of Electronics Engineering, Ajou University)
Publication Information
Journal of Electrical Engineering and Technology / v.6, no.6, 2011 , pp. 824-828 More about this Journal
Abstract
Transmission line analysis of the surface a cumulation layer in injection-enhanced gate transistor (IEGT) is presented for the first time, based on per-unit-length resistance and conductance of the surface layer beneath the gate of IEGT. Lateral electric field on the accumulation layer surface, as well as the electron current injected into the accumulation layer, is governed by the well-known wave equation, and decreases as an exponential function of the lateral distance from the cathode. Unit-length resistance and conductance of the layer are expressed in terms of the device parameters and the applied gate voltage. Results obtained from the experiments are consistent with the numerical simulations.
Keywords
IEGT; Accumulation layer; Surface potential; Transmission line analysis;
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