• Title/Summary/Keyword: ACLR

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RF Transceiver Implementation to Evaluate the Requirements of 3G W-CDMA User Equipment (3G W-CDMA UE 요구사항 평가를 위한 RF 트랜시버 구현)

  • Il-Kyoo Lee;Seung-Hyeub Oh
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.2
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    • pp.148-156
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    • 2003
  • This paper describes the RF performance issues of UE for W-CDMA system based on 3 GPP specifications. The parameters of transmitter and receiver are derived from the viewpoint of RF performance. In order for UE to achieve high performance, the transceiver performance requirements such as ACLR, EVM, Peak Code Domain Error, spectrum emission mask, frequency error stability and TX power control dynamic range for transmitter and reference sensitivity level, blocking characteristics, noise figure, ACS, AGC dynamic range for receiver are considered. On the basis of the required parameters, the UE RF transceiver is implemented and then the evaluation of RF performance is accomplished through practical test scenarios.

Design and fabrication of Power Amplifier with HBT for IMT-2000 Handsets (IMT-2000 단말기용 HBT 전력증폭기 설계 및 제작)

  • 정동영;박상완;정봉식
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.2
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    • pp.276-283
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    • 2003
  • In this paper, a 2-stage power amplifier(PA) for IMT-2000 handset has been designed and fabricated using SiGe HBT, which has excellent frequency characteristics and linearity, to reduce size and weight instead of existing linearization techniques. DC I-V characteristics and S-parameter of SiGe HBT were simulated by Agilent circuit simulator(ADS), with large signal Gummel-Poon nonlinear circuit model. Then the output and interstage matching circuits were designed to satisfy the high power condition and the high gain condition, respectively. The experimental results showed output power of 27.1dBm and ACLR of 20dB, PAE of 34%, and linear power gain of 18.9dB over frequency ranges from 1920MHz to 1980MHz.

A Study on Linearity Improvement of Cartesian Vector Modulator Predistorter for WiMax Applications (모바일 WiMax용 카르테시안 벡터 모듈레이터 전치왜곡기의 선형성 개선에 관한 연구)

  • Chun, Sang-Hyun;Kim, Ji-Yeon;Kim, Jong-Heon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.9 no.4
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    • pp.32-42
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    • 2010
  • In this paper, we represent considering parameters for design of a Cartesian vector modulator predistorter to maximize linearity improvement of the predistorter and propose an advanced Cartesian vector modulator predistrotrer with nonlinear starting point control circuit. In order to confirm the performance of the proposed predistorter, the predistorter is applied to power amplifier with 15 W output power for 2.5 GHz band mobile WiMax 1-FA signal. From the measured results, ACLR of -45.3 dBc with 4 dB improvement of ALCR compared with the previous predistorter is obtained and linearity improvement range is also extended.

On-chip Smart Functions for Efficiency Enhancement of MMIC Power Amplifiers for W-CDMA Handset Applications

  • Youn S. Noh;Kim, Ji H.;Kim, Joon H.;Kim, Song G.;Park, Chul S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.1
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    • pp.47-54
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    • 2003
  • New efficiency enhancement techniques have been devised and implemented to InGaP/GaAs HBT MMIC power amplifiers for W-CDMA mobile terminals applications. Two different types of bias current control circuits that select the efficient quiescent currents in accordance with the required output power levels are proposed for overall power efficiency improvement. A dual chain power amplifier with single matching network composed of two different parallel-connected power amplifier is also introduced. With these efficiency enhancement techniques, the implemented MMIC power amplifiers presents power added efficiency (PAE) more than 14.8 % and adjacent channel leakage ratio(ACLR) lower than -39 dBc at 20 dBm output power and PAE more than 39.4% and ACLR lower than -33 dBc at 28 dBm output power. The average power usage efficiency of the power amplifier is improved by a factor of more than 1.415 with the bias current control circuits and even up to a factor of 3 with the dual chain power amplifier.

Effects of Drain Bias on Memory-Compensated Analog Predistortion Power Amplifier for WCDMA Repeater Applications

  • Lee, Yong-Sub;Lee, Mun-Woo;Kam, Sang-Ho;Jeong, Yoon-Ha
    • Journal of electromagnetic engineering and science
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    • v.9 no.2
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    • pp.78-84
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    • 2009
  • This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${\pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.

The Improvement of Linearity in Power Amplifier Using Anti Phase Intermodulation Distortion Linearization Technique (역위상 기법을 이용한 전력 증폭기 선형성 개선)

  • Jang, Jeong-Seok;Do, Ji-Hoon;Kang, Dong-Jin;Kim, Dae-Woong;Kim, Dae-Huo;Hong, Ui-Seok
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.2
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    • pp.62-69
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    • 2008
  • This paper proposes linearization technique that the linearity is improved by controlling IMD between the drive stage and the output stage. From the experimental results of W-CDMA 4FA input signal, this amplifier has ACLR of -48dBc@5MHz offset at 50W average power. Proposed linearization technique provides predistortion effect for using drive amplifier without additional circuit, which is the significant in this paper that it makes up for the weak point of analog predistortion method and feedforward method.

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A Low Power and High Linearity Up Down Converter for Wireless Repeater (무선 중계기용 저전력, 고선형 Up-down Converter)

  • Hong, Nam Pyo;Kim, Kwang Jin;Jang, Jong-Eun;Chio, Young-Wan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.3
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    • pp.433-437
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    • 2015
  • We have designed and fabricated a low power and high linearity up down convertor for wireless repeaters using $0.35{\mu}m$ SiGe Bipolar CMOS technology. Repeater is composed of a wideband up/down converting mixer, programmable gain amplifiers (PGA), input buffer, LO buffer, filter driver amplifier and integer-N phase locked loop (PLL). As of the measurement results, OIP3 of the down conversion mixer and up conversion mixer are 32 dBm and 17.8 dBm, respectively. The total dynamic gain range is 31 dB with 1 dB gain step resolution. The adjacent channel leakage ratio (ACLR) is 59.9 dBc. The total power consumption is 240 mA at 3.3 V.

A dual-path high linear amplifier for carrier aggregation

  • Kang, Dong-Woo;Choi, Jang-Hong
    • ETRI Journal
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    • v.42 no.5
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    • pp.773-780
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    • 2020
  • A 40 nm complementary metal oxide semiconductor carrier-aggregated drive amplifier with high linearity is presented for sub-GHz Internet of Things applications. The proposed drive amplifier consists of two high linear amplifiers, which are composed of five differential cascode cells. Carrier aggregation can be achieved by switching on both the driver amplifiers simultaneously and combining the two independent signals in the current mode. The common gate bias of the cascode cells is selected to maximize the output 1 dB compression point (P1dB) to support high-linear wideband applications, and is used for the local supply voltage of digital circuitry for gain control. The proposed circuit achieved an output P1dB of 10.7 dBm with over 22.8 dBm of output 3rd-order intercept point up to 0.9 GHz and demonstrated a 55 dBc adjacent channel leakage ratio (ACLR) for the 802.11af with -5 dBm channel power. To the best of our knowledge, this is the first demonstration of the wideband carrier-aggregated drive amplifier that achieves the highest ACLR performance.

A Study on the Design of Linear Power Amplifier at Digital Control System (디지털 제어방식의 선형전력증폭기 설계에 관한 연구)

  • 김갑기;조학현;조기량
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.5
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    • pp.724-730
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    • 2002
  • Digital communication systems are required to cause the minimum interference to adjacent channels, they must therefore employ the linear power amplifiers. In respect to linear power amplifiers, there are many linearization techniques. Feedforward power amplifier represent very wide bandwidth and high linearization capability. In the feedforward systems, overall efficiency is reduced due to the loss of delay line. In this paper, delay filter instead of transmission delay line adapted to get more high efficiency. Experimental results showed that ACLR (Adjacent Channel Leakage Ratio) has improved 17.43(dB), which is added 3.44(dB) by using the delay filter.

Design of IMT-2000 Feedforward Digital Adaptive Linear Power Amplifier (IMT-2000 전방궤환 디지털 적응 선형전력증폭기 설계)

  • Kim, Kab-Ki;Park, Gyei-Kark
    • Journal of Navigation and Port Research
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    • v.26 no.3
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    • pp.295-302
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    • 2002
  • Currently digital communication system adapt various digital modulation schemes. All these communication systems are required to cause the minimum interference to adjacent channels, they must therefore employ the linear power amplifiers. In respect to linear power amplifiers, there are many linearization techniques. Feedforward power amplifier represent very wide bandwidth and high linearization capability. In the feedforward systems overall efficiency is reduced due to the loss of delay line. In this paper, delay filter instead of transmission delay line adapted to get more high efficiency. Experimental results showed that ACLR has improved 17.04dB which is added 2.54dB by using the delay filter.