• 한국통신학회논문지
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• 제22권8호
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• pp.1622-1631
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• 1997

A 3-stages Active Microstrip Phased Array Antenn(AMPAA) is implemented using Injection-Locking Coupled Oscillators(ILCO). The AMPAA is a beam scanning active antenna with capability of electrical scanning by frequency varation of ILCO. The synchronization of resonance frequencies in array elements is occured by ILCO, and the ILCO amplifies the injection signal and functions as a phase shifter. The microstrip ptch is operated as a radiation element. The unilateral amplifier is a mutual coupling element of AMPAA, eliminates the reverse locking signal and controls the locking bandwidth of ILCO. The possibility of Monolithic Microwave Integrated Circuits(MMIC) of T/R module is proposed by simplified and integrated fabrication process of AMPAA. The 0.75.$lambda_{0}$ is fixed for a mutual coupling space to wide the scanning angle and minimize the multi-mode. The AMPAA has beam scanning angle of 31.4.deg., HPBW(Half Power Beam Widths) of 26.deg., directive gain of 13.64dB and side lobe of -16.5dB were measured, respectively.

• ETRI Journal
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• 제45권2호
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• pp.338-345
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• 2023

A filtering power divider based on air-filled substrate-integrated waveguide (AFSIW) technology is proposed in this study. The AFSIW structure is used in the proposed filtering power divider for substantially reducing the transmission losses. This structure occupies a large area because of the use of air as a dielectric instead of typical dielectric materials. A filtering power divider provides power division and frequency selectivity simultaneously in a single device. The proposed filtering power divider comprises three AFSIW cavities. The filtering function is achieved using symmetrical inductive posts. The input and output ports of the proposed circuit are realized by directly connecting coaxial lines to the AFSIW cavities. This transition from the coaxial line to the AFSIW cavity eliminates the additional transitions, such as AFSIW-SIW and SIW-conductor-backed coplanar waveguide, applied in existing AFSIW circuits. The proposed power divider with a second-order bandpass filtering response is fabricated and measured at 5.5 GHz. The measurement results show that this circuit has a minimum insertion loss of 1 dB, 3-dB fractional bandwidth of 11.2%, and return loss exceeding 11 dB.

• ETRI Journal
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• 제23권1호
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• pp.23-32
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• 2001

Examination of the statistical variation of integrated passive components is crucial for designing and characterizing the performance of multichip module (MCM) substrates. In this paper, the statistical analysis of parallel plate capacitors with gridded plates manufactured in a multilayer low temperature cofired ceramic (LTCC) process is presented. A set of integrated capacitor structures is fabricated, and their scattering parameters are measured for a range of frequencies from 50 MHz to 5 GHz. Using optimized equivalent circuits obtained from HSPICE, mean and absolute deviation is calculated for each component of each device model. Monte Carlo Analysis for the capacitor structures is then performed using HSPICE. Using a comparison of the Monte Carlo results and measured data, it is determined that even a small number of sample structures, the statistical variation of the component values provides an accurate representation of the overall capacitor performance.

• 마이크로전자및패키징학회지
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• 제7권3호
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• pp.31-36
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• 2000

RF(radio Frequency)용 MCM(Multichip Module)-D 기판 내장형 인덕터를 개발하였다. MCM 기술은 고밀도 패키징 기술로서 주로 디지털회로에 많이 적용되어 왔으나, 최근에는 아날로그회로 및 디지털회로가 혼재된 혼성신호 및 초고주파 회로에도 적용되고 있다. 혼성신호에서는 능동소자 주변에 많은 수의 수동소자가 연결되므로 MCM-D 기판에 수동소자를 내장시키면 원가절감과 시스템의 크기 축소 및 경량화를 이를 수 있을 뿐 아니라, 성능과 신뢰성을 향상시킬 수 있다. 본 논문에서 MCM-D 기판은 Cu/감광성 BCB(Benzocyclobutene)를 각각 금속배선 및 절연막 재료로 사용하였고, 금속배선은 Ti/Cu를 각각 1000 $\AA$/3000 $\AA$으로 스퍼터한 후 fountain 방식으로 전기 도금하여 3 $\mu\textrm{m}$ Cu를 형성하였으며, 인덕터는 coplanar구조로 하여 기존의 반도체 공정을 이용하여 MCM-D기판에 인덕터를 안정적으로 내장시키고 전기적 특성을 측정하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.139-142
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• 2001

As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• Journal of the Optical Society of Korea
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• 제14권4호
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• pp.438-443
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• 2010

In this paper, behaviors of photonic crystal (PC) radiative structures and antenna arrays have been compared for two types of uniform and binomial excitations. Appropriate duality has been shown between them. These results can be generalized to other types of excitation and arrangement of photonic crystal radiative arrays such as linear, planar and circular arrays of three dimensional (3D) photonic crystal termination resonators. Using these results in designing photonic circuits has some advantages for shaping a particular radiative beam at the photonic crystal exit, for instance reducing the divergence angle of the main lobe in order to enhance the directivity, for better coupling, or for splitting the emitted beam, for dividing the output beam to the next devices in photonic integrated circuits (PIC). For analysis and simulation of the photonic crystal structures, the finite difference time domain (FDTD) method has been employed.

• Journal of the Optical Society of Korea
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• 제15권2호
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• pp.187-195
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• 2011

We have designed two photonic crystal waveguide (PCW) structures with output focused beams in order to achieve more coupling between photonic devices and decrease the mismatch losses in photonic integrated circuits. PCW with coupled resonator optical waveguide (CROW) termination has been optimized by both one dimensional (1D) and seven dimensional (7D) particle swarm optimization (PSO) algorithms by evaluating the fitness function by the finite difference time domain (FDTD) method. The 1D and 7D-optimizations caused the factors of 2.79 and 3.875 improvements in intensity of the main lobe compared to the non-optimized structure, whereas the FWHM in 7D-optimized structure was increased, unlike the 1D case. It has also been shown that the increment of focusing causes decrement of the bandwidth.

• 한국광학회지
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• 제33권4호
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• pp.137-145
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• 2022

광집적회로(photonic integrated circuits) 소자의 기본적인 부품 중 하나인 방향성 결합기 소자는 두 개의 인접한 광도파로 사이에서 일어나는 모드 간 광결합에 의해서 광파워를 분배하는 기능을 가진다. 본 논문에서는 방향성 결합기 소자를 제작하기 위한 설계 과정에 대하여 살펴보고 실제로 제작된 소자의 특성으로부터 설계 결과의 정확도에 대하여 확인하는 과정을 수행한다. 빔전파기법(beam propagation method, BPM) 시뮬레이션을 통하여 방향성 결합기 소자를 설계하는 과정에서, 유효굴절률 계산을 통하여 2차원 평면 구조로 변환된 소자에 대한 이차원 BPM 설계를 하여서 소자 구조를 확정하고, 실리카 광도파로 방향성 결합기 소자를 어레이 형태로 제작한 뒤 특성을 측정하였다. 실험 결과와 차이를 보이는 2D BPM 설계 결과를 보완하기 위하여 계산량이 훨씬 많은 3D BPM 설계를 수행하였으며 그 결과는 실험 결과에 더욱 근접하였다. 실험 결과와 일치하는 설계 결과를 얻기 위하여 3D BPM에 사용된 광도파로 코어 굴절률을 미세하게 보정하였으며 이를 통하여 실험치를 정확히 예측 가능한 BPM 설계를 수행하는 방법을 확립하였다.

• Journal of information and communication convergence engineering
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• 제14권4호
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• pp.258-267
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• 2016

Three-dimensional integrated circuits (3D ICs) experience die-to-die variations in addition to the already challenging within-die variations. This adds an additional design complexity and makes variation estimation and full-chip optimization even more challenging. In this paper, we show that the industry standard on-chip variation (AOCV) tables cannot be applied directly to 3D paths that are spanning multiple dies. We develop a new machine learning-based model and methodology for an accurate variation estimation of logic paths in 3D designs. Our model makes use of key parameters extracted from existing GDSII 3D IC design and sign-off simulation database. Thus, it requires no runtime overhead when compared to AOCV analysis while achieving an average accuracy of 90% in variation evaluation. By using our model in a full-chip variation-aware 3D IC physical design flow, we obtain up to 16% improvement in critical path delay under variations, which is verified with detailed Monte Carlo simulations.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.61-64
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• 2002

We have optimally designed and implemented by a monolithic microwave integrated circuit(MMIC) the low noise amplifier(LNA) of 5.8GHz band composed of receiver front-end(RFE) in a on-board equipment system for dedicated short range communication using a depletion-mode GaAs MESFET. The LNA is provided with two active devices, matching circuits, and two drain bias circuits. Operating at a single supply of 3V and a consumption current of 18㎃, The gain at center frequency 5.8GHz is 13.4dB, Noise figure(NF) is 1.94dB, Input 3rd order intercept point(lIPS) is 3dBm, and Input return loss(5$_{11}$) and Output return loss(S$_{22}$) is -l8dB and -13.3dB, respectively. The circuit size is 1.2$\times$O.7$\textrm{mm}^2$.EX>.>.