• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.143-149
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• 2008

A novel compact model for a five-port transformer balun is proposed for the efficient circuit design of hybrid balun. Compared to the conventional model, the proposed model provides much faster computation time and more reasonable values for the extracted parameters. The hybrid balun, realized in $0.18\;{\mu}m$ CMOS, achieves 2.8 dB higher gain and 1.9 dB lower noise figure than its passive counterpart only at a current consumption of 0.67 mA from 1.2 V supply. By employing the hybrid balun, a differential zero-IF receiver is designed in $0.18\;{\mu}m$ CMOS for IEEE 802.15.4 ZigBee applications. It is composed of a differential cascode LNA, passive mixers, and active RC filters. Comparative investigations on the three receiver designs, each employing the hybrid balun, a simple transformer balun, and an ideal balun, clearly demonstrate the advantages of the hybrid balun in fully differential CMOS RF receivers. The simulated results of the receiver with the hybrid balun show 33 dB of conversion gain, 4.2 dB of noise figure with 20 kHz of 1/f noise corner frequency, and -17.5 dBm of IIP3 at a current consumption of 5 mA from 1.8 V supply.

• Electronics and Telecommunications Trends
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• v.36 no.3
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• pp.53-64
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• 2021

As the 5G service market is expected to grow rapidly, the development of high-power, high-efficiency power amplifiers for the 5G communication infrastructure is indispensable. Gallium nitride (GaN) is attracting great interest as a key device in power devices and integrated circuits due to its wide bandgap, high carrier concentration, high electron mobility, and high-power saturation characteristics. In this study, we investigate the technology trends of Ka-band GaN radio frequency (RF) power devices and integrated circuits for operation in the millimeter-wave band of recent 5G mobile communication services. We review the characteristics of GaN RF high electron mobility transistor (HEMT) devices to implement power amplifiers operating at frequencies around 28 GHz and compare the technology of foreign companies with the device characteristics currently developed by the Electronics and Telecommunication Research Institute (ETRI). In addition, the characteristics of Ka-band GaN monolithic microwave integrated circuit (MMIC) power amplifiers manufactured using various GaN HEMT device technologies are reviewed by comparing characteristics such as frequency band, output power, and output power density of integrated circuits. In addition, by comparing the performance of the power amplifier developed by ETRI, the current status and future direction of domestic GaN power devices and integrated circuit technology will be discussed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.549-554
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• 2003

In this paper, we have designed and implemented by a monolithic microwave integrated circuit(MMIC) of a 5.8GHz-band low noise amplifier (LNA) composed of receiver front-end(RFE) in a on-board equipment system for dedicated short range communication. The designed LNA is provided with two active devices, matching circuits, and two drain bias circuits. Operating at a single supply of 3V and a consumption current of 18mA, The gain at center frequency 5.8GHz is 13.4dB, NF is 1.94dB, Input IP3 is -3dBm, S$_{11}$ is -18dB, and S$_{22}$ is -13.3dB. The circuit size is 1.2 $\times$ 0.7 $\textrm{mm}^2$.>.

• ETRI Journal
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• v.36 no.4
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• pp.635-642
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• 2014

Three-dimensional integrated circuits (3D ICs) implement heterogeneous systems in the same platform by stacking several planar chips vertically with through-silicon via (TSV) technology. 3D ICs have some advantages, including shorter interconnect lengths, higher integration density, and improved performance. Thermal-aware design would enhance the reliability and performance of the interconnects and devices. In this paper, we propose thermal-aware floorplanning with min-cut die partitioning for 3D ICs. The proposed min-cut die partition methodology minimizes the number of connections between partitions based on the min-cut theorem and minimizes the number of TSVs by considering a complementary set from the set of connections between two partitions when assigning the partitions to dies. Also, thermal-aware floorplanning methodology ensures a more even power distribution in the dies and reduces the peak temperature of the chip. The simulation results show that the proposed methodologies reduced the number of TSVs and the peak temperature effectively while also reducing the run-time.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.5
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• pp.682-687
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• 2022

In this paper, the research results on monolithic three-dimensional integrated-circuit (M3DICs) stacked with tunneling field effect transistors (TFETs) are introduced. Unlike metal-oxide-semiconductor field-effect transistors (MOSFETs), TFETs are designed differently from the layout of symmetrical MOSFETs because the source and drain of TFET are asymmetrical. Various monolithic 3D inverter (M3D-INV) structures and layouts are possible due to the asymmetric structure, and among them, a simple inverter structure with the minimum metal layer is proposed. Using the proposed M3D-INV, this M3D logic gates such as NAND and NOR gates by sequentially stacking TFETs are proposed, respectively. The simulation results of voltage transfer characteristics of the proposed M3D logic gates are investigated using mixed-mode simulator of technology computer aided design (TCAD), and the operation of each logic circuit is verified. The cell area for each M3D logic gate is reduced by about 50% compared to one for the two-dimensional planar logic gates.

• Journal of electromagnetic engineering and science
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• v.17 no.1
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• pp.29-33
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• 2017

This paper proposes a half-mode substrate integrated waveguide (HMSIW) amplifier using lumped-element transition. The input and output impedances of this amplifier are matched by the lumped-element transition structure. This structure provides compact impedance and mode matching circuits between the HMSIW and a stand-alone amplifier. Surface mount technology inductors and capacitors are implemented to realize the lumped-element transition. A prototype of the proposed HMSIW amplifier shows 15 dB gain with 3 dB bandwidth of 4 to 7.05 GHz in a simulation and measurement.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.1-6
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• 2013

3D integrated circuit(IC) technology with TSV(through Si via) liquid cooling system is discussed. As a device scales down, both interconnect and packaging technologies are not fast enough to follow transistor's technology. 3D IC technology is considered as one of key technologies to resolve a device scaling issue between transistor and packaging. However, despite of many advantages, 3D IC technology suffers from power delivery, thermal management, manufacturing yield, and device test. Especially for high density and high performance devices, power density increases significantly and it results in a major thermal problem in stacked ICs. In this paper, the recent studies of TSV liquid cooling system has been reviewed as one of device cooling methods for the next generation thermal management.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.232-238
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• 2008

In this paper, a wideband power efficient 2.2 GHz - 4.9 GHz Medium Power Amplifier (MPA), has been designed and fabricated using $0.8{\mu}m$ SiGe BiCMOS process technology. Passive elements such as parallel-branch spiral inductor, metal-insulator-metal (MIM) capacitor and three types of resistors are all integrated in this process. This MPA is a two stage amplifier with all matching components and bias circuits integrated on-chip. A P1dB of 17.7 dBm has been measured with a power gain of 8.7 dB at 3.4 GHz with a total current consumption of 30 mA from a 3 V supply voltage at $25^{\circ}C$. The measured 3 dB bandwidth is 2.7 GHz and the maximum Power Added Efficiency (PAE) is 41 %, which are very good results for a fully integrated Medium PA. The fabricated circuit occupies a die area of $1.7mm{\times}0.8mm$.

• ETRI Journal
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• v.30 no.5
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• pp.729-734
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• 2008

Wireless communication systems, such as WLAN or Bluetooth receivers, employ preamble data to estimate the channel characteristics, introducing stringent settling-time constraints. This makes the use of traditional closed-loop feedback automatic gain control (AGC) circuits impractical for these applications. In this paper, a compact feedforward AGC circuit is proposed to obtain a fast-settling response. The AGC has been implemented in a 0.35 ${\mu}m$ standard CMOS technology. Supplied at 1.8 V, it operates with a power consumption of 1.6 mW at frequencies as high as 100 MHz, while its gain ranges from 0 dB to 21 dB in 3 dB steps through a digital word. The settling time of the circuit is below 0.25 ${\mu}s$.

• Journal of information and communication convergence engineering
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• v.15 no.2
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• pp.117-122
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• 2017

Three-dimensional integrated circuits (3D ICs), starting with memory cubes, have entered the mainstream recently. The benefits many predicted in the past are indeed delivered, including higher memory bandwidth, smaller form factor, and lower energy. However, 3D ICs have yet to find their deployment in aerospace applications. In this paper we first present key design tools and methodologies for high performance, low power, and reliable 3D ICs that mainly target terrestrial applications. Next, we discuss research needs to extend their capabilities to ensure reliable operations under the harsh space environments. We first present a design methodology that performs fine-grained partitioning of functional modules in 3D ICs for power reduction. Next, we discuss our multi-physics reliability analysis tool that identifies thermal and mechanical reliability trouble spots in the given 3D IC layouts. Our tools will help aerospace electronics designers to improve the reliability of these 3D IC components while not degrading their energy benefits.