• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.1
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• pp.84-89
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• 2019

JPEG is a most widely used standard image compression technology. This research introduces the JPEG image compression algorithm and describes each step in the compression and decompression. Image compression is the application of data compression on digital images. The DCT (discrete cosine transform) is a technique for converting a time domain to a frequency domain. First, the image is divided into 8 by 8 pixel blocks. Second, working from top to bottom left to right, the DCT is applied to each block. Third, each block is compressed through quantization. Fourth, the matrix of compressed blocks that make up the image is stored in a greatly reduced amount of space. Finally if desired, the image is reconstructed through decompression, a process using IDCT (inverse discrete cosine transform). The purpose of this research is to review all the processes of image compression / decompression using the discrete cosine transform method.

• Journal of Advanced Navigation Technology
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• v.23 no.2
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• pp.97-103
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• 2019

In this paper, we designed and fabricated a receiving modem that can be applied to guided weapons can change real-time targets with little effect of fading. The designed modem consists of synchronous detector, timing error estimator, timing recovery, differential decoder and viterbi decoder, and it's implemented in FPGA so that it can be redesigned and modified according to requirements. The modem board was directly converted from IF frequency to baseband and converted into digital data through ADC. It is confirmed that it is applicable to the guided weapons that changing real-time targets through simulations, measurements and test.

• Korean Journal of Remote Sensing
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• v.30 no.2
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• pp.185-205
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• 2014

SAR ground moving target indicator (GMTI) has long been an important issue for SAR advanced applications. As spatial resolution of space-borne SAR system has been significantly improved recently, the GMTI becomes a very useful tool. Various GMTI techniques have been developed particularly using multi-channel SAR systems. It is, however, still problematic to detect ground moving targets within single channel SAR images while it is not practical to access high resolution multi-channel space-borne SAR systems. Once a ground moving target is detected, it is possible to retrieve twodimensional velocities of the target from single channel space-borne SAR with an accuracy of about 5 % if moving faster than 3 m/s. This paper presents a quick-and-dirty method for detecting ground moving targets from single channel SAR single-look complex (SLC) images by differentiation. Since the signal powers of derivatives present Doppler centroid and rate, it is very efficient and effective for detection of non-stationary targets. The derivatives correlate well with velocities retrieved by a precise method with a correlation coefficient $R^2$ of 0.62, which is well enough to detect the ground moving targets. While the approach is theoretically straightforward, it is necessary to remove the effects of residual Doppler rate before finalizing the ground moving target candidates. The confidence level of results largely depends on the efficiency and effectiveness of the residual Doppler rate removal method. Application results using TerraSAR-X and truck-mounted corner reflectors validated the efficiency of the method. While the derivatives of moving targets remain easily detectable, the signal energy of stationary corner reflectors was suppressed by about 18.5 dB. It results in an easy detection of ground targets moving faster than 8.8 km/h. The proposed method is applicable to any high resolution single channel SAR systems including KOMPSAT-5.

• Journal of the Korean Society of Marine Environment & Safety
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• v.24 no.5
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• pp.628-636
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• 2018

Because large buoys are mainly made of steel, they are heavy and vulnerable to corrosion by sea water. This makes buoy installation and maintenance difficult. Moreover, vessel collision accidents with buoys and damage to vessels due to the material of buoys (e.g., steel) are reported every year. Recently, light buoys adopting eco-friendly and lightweight materials have come into the spotlight in order to solve the previously-mentioned problems. In Korea, a new lightweight buoy with a 7-Nautical Mile lantern adopting expanded polypropylene (EPP) and aluminum to create a buoyant body and tower structure, respectively, was developed in 2017. When these light buoys are operated in the ocean, the visibility and angle of light from the lantern installed on the light buoys changes, which may cause them to function improperly. Therefore, research on the performance of light buoys is needed since the weight distribution and motion characteristics of these new buoys differ from conventional models. In this study, stability estimation and motion analyses for newly-developed buoys under various environmental conditions considering a mooring line were carried out using ANSYS AQWA. Numerical simulations for the estimation of wind and current loads were performed using commercial CFD software, Siemens STAR-CCM+, to increase the accuracy of motion analysis. By comparing the estimated maximum significant motions of the light buoys, it was found that waves and currents were more influential in the motion of the buoys. And, the estimated motions of the buoys became larger as the sea state became worser, which might be the reason that the peak frequencies of the wave spectra got closer to those of the buoys.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.5 s.335
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• pp.31-38
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• 2005

The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

• Journal of Internet Computing and Services
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• v.13 no.3
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• pp.49-59
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• 2012

Throughout developing digital technology, reproduction of image is growing better day by day. And at the same time, diverse image editing softwares are developed to manage images easily. In the process of editing images, those programs could delete or modify EXIF files which have the original image information; therefore images without the origin source are widely spread on the web site after editing. This matter could affect analysis of images due to the distortion of originality. Especially in the court of law, the source of evidence should be expressed clearly; therefore digital image EXIF file without deletion or distortion could not be the objective evidence. In this research, we try to trace the identification of a digital camera in order to solve digital images originality, and also we focus on lens distortion correction algorism which is used in digital image processing. Lens distortion correction uses mapping algorism, and at this moment it also uses interpolation algorism to prevent aliasing artifact and reconstruction artifact. At this point interpolation shows the similar mapping pattern; therefore we want to find out the interpolation evidence. We propose a minimum filter algorism in order to detect interpolation pattern and adjust the same minimum filter coefficient in two areas; one has interpolation and the second has no interpolation. Throughout DFT, we confirm frequency character between each area. Based on this result, we make the final detection map by using differences between two areas. In other words, thereby the area which has the interpolation caused by mapping is adjusted using minimum filter for detection algorism; the second area which has no interpolation tends to different frequency character.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.7
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• pp.49-53
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• 2016

Recently, the use of signal compression methods to improve the efficiency of wireless networks have increased. In particular, the MPC system was used in the pitch extraction method and the excitation source of voiced and unvoiced to reduce the bit rate. In general, the MPC system using an excitation source of voiced and unvoiced would result in a distortion of the synthesis speech waveform in the case of voiced and unvoiced consonants in a frame. This is caused by normalization of the synthesis speech waveform in the process of restoring the multi-pulses of the representation segment. This paper presents an ACFBD-MPC (Amplitude Compensation Frequency Band Division-Multi Pulse Coding) using amplitude compensation in a multi-pulses each pitch interval and specific frequency to reduce the distortion of the synthesis speech waveform. The experiments were performed with 16 sentences of male and female voices. The voice signal was A/D converted to 10kHz 12bit. In addition, the ACFBD-MPC system was realized and the SNR of the ACFBD-MPC estimated in the coding condition of 8kbps. As a result, the SNR of ACFBD-MPC was 13.6dB for the female voice and 14.2dB for the male voice. The ACFBD-MPC improved the male and female voice by 1 dB and 0.9 dB, respectively, compared to the traditional MPC. This method is expected to be used for cellular telephones and smartphones using the excitation source with a low bit rate.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.43 no.3 s.309
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• pp.9-16
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• 2006

Many image and video compression algorithms work by splitting the image into blocks and producing variable-length code bits for each block data. If variable-length code data are transmitted consecutively over error-prone channel without any error protection technique, the receiving decoder cannot decode the stream properly. So the standard image and video compression algorithms insert some redundant information into the stream to provide some protection against channel errors. One of redundancies is resynchronization marker, which enables the decoder to restart the decoding process from a known state in the event of transmission errors, but its usage should be restricted not to consume bandwidth too much. The Error Resilient Entropy Code(EREC) is well blown method which can regain synchronization without any redundant information. It can work with the overall prefix codes, which many image compression methods use. This paper proposes EREREC method to improve FEREC(Fast Error-Resilient Entropy Coding). It first calculates initial searching position according to bit lengths of consecutive blocks. Second, initial offset is decided using statistical distribution of long and short blocks, and initial offset can be adjusted to insure all offset sequence values can be used. The proposed EREREC algorithm can speed up the construction of FEREC slots, and can improve the compressed image quality in the event of transmission errors. The simulation result shows that the quality of transmitted image is enhanced about $0.3{\sim}3.5dB$ compared with the existing FEREC when random channel error happens.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.141-146
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• 2016

HEVC/H.265 is the latest joint video coding standard proposed by ITU-T SG 16 WP and ISO/IEC JTC 1/SC29/WG 11. In H.265, pictures are divided into a sequence of coding tree units(CTUs), and the CTU further is partitioned into multiple CUs to adapt to various local characteristics. Its coding efficiency is approximately two times high compared to previous standard H.264/AVC. However according to the size of extended CU(coding unit) and transform block, the hardware size of PMR(prediction/mode decision/reconstruction) block within video encoder is about 4 times larger than previous standard. In this study, we propose a new less complex hardware architecture of PMR block which has the most high complexity within encoder without any noticeable PSNR loss. Using this simplified block, we can shrink the overall size the H.265 encoder. For FHD image, it operates at clocking frequency of 300 MHz and frame rate of 60 fps. And also for the test image, the Bjøntegaard Delta (BD) bit rate increase about average 30 % in PMR prediction block, and the total estimated gate count of PMR block is around 1.8 M.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.42 no.2 s.302
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• pp.27-36
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• 2005

This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.