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http://dx.doi.org/10.5573/ieie.2016.53.12.141

A Study on the HEVC Video Encoder PMR Block Design  

Lee, Sukho (한국전자통신연구원 지능형반도체연구부)
Lee, Jehyun (동양미래대학교 전기전자통신공학부)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.53, no.12, 2016 , pp. 141-146 More about this Journal
Abstract
HEVC/H.265 is the latest joint video coding standard proposed by ITU-T SG 16 WP and ISO/IEC JTC 1/SC29/WG 11. In H.265, pictures are divided into a sequence of coding tree units(CTUs), and the CTU further is partitioned into multiple CUs to adapt to various local characteristics. Its coding efficiency is approximately two times high compared to previous standard H.264/AVC. However according to the size of extended CU(coding unit) and transform block, the hardware size of PMR(prediction/mode decision/reconstruction) block within video encoder is about 4 times larger than previous standard. In this study, we propose a new less complex hardware architecture of PMR block which has the most high complexity within encoder without any noticeable PSNR loss. Using this simplified block, we can shrink the overall size the H.265 encoder. For FHD image, it operates at clocking frequency of 300 MHz and frame rate of 60 fps. And also for the test image, the Bjøntegaard Delta (BD) bit rate increase about average 30 % in PMR prediction block, and the total estimated gate count of PMR block is around 1.8 M.
Keywords
HEVC; H.265; CU(Coding Unit); PMR(Prediction/Mode decision/Reconstruction);
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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