• Composites Research
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• v.20 no.3
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• pp.50-54
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• 2007

The Ionic Polymer Metal Composite (IPMC), an electro-active polymer, has many advantages including bending actuation, low weight, low power consumption, and flexibility. These advantages coincide with the requirements of a bio-related application. Thus, IPMC is promising materials for bio-mimetic actuator and sensor applications. Before applying IPMC to actual application, basic mechanical properties of IPMC should be studied in order to utilize IPMC for practical uses. Therefore, IPMCs are fabricated to investigate the mechanical characteristics. Nafion is used as a base ionic polymer. Mason samples cast with various thicknesses are used to test the thickness effects of IPMC. Subsequently, IPMC is fabricated using the chemical reduction method. The deformation, blocking force and frequency response of the IPMC actuator are important properties. In this present study, the performances of the IPMC actuators, including the deformation, blocking force and natural frequency, are then obtained according to only the input voltage and IPMC dimensions. Finally, the empirical performance model and the equivalent stiffness model of the IPMC actuator are established using experiments results.

• Korean Journal of Materials Research
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• v.33 no.9
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• pp.372-376
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• 2023

Transparent conductive tungsten (W) doped indium oxide (In₂O₃; IWO) films were deposited at different substrate bias voltage (-V_b) conditions at room temperature on glass substrates by radio frequency (RF) magnetron sputtering and the influence of the substrate bias voltage on the optical and electrical properties was investigated. As the substrate bias voltage increased to -350 V_b, the IWO films showed a lower resistivity of 2.06 × 10^-4 Ωcm. The lowest resistivity observed for the film deposited at -350 V_b could be attributed to its higher mobility, of 31.8 cm²/Vs compared with that (6.2 cm²/Vs) of the films deposited without a substrate bias voltage (0 V_b). The highest visible transmittance of 84.1 % was also observed for the films deposited at the -350 V_b condition. The X-ray diffraction observation indicated the IWO films deposited without substrate bias voltage were amorphous phase without any diffraction peaks, while the films deposited with bias voltage were polycrystalline with a low In₂O₃ (222) diffraction peak and relatively high intensity (431) and (046) diffraction peaks. From the observed visible transmittance and electrical properties, it is concluded that the opto-electrical performance of the polycrystalline IWO film deposited by RF magnetron sputtering can be enhanced with effective substrate bias voltage conditions.

• Journal of IKEEE
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• v.27 no.4
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• pp.512-517
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• 2023

In this study, we propose a liquid crystal-based polarization control technology that can control polarization by adjusting the voltage applied to the liquid crystal, and apply it to a Closed-circuit Television (CCTV) to transmit only the desired angle of polarized light. CCTV with conventional polarizing films cannot control polarization because they focus on backlight compensation, so light reflected from the water surface or highlights reflected from vehicles interfere with subject identification. However, the Vertical Alignment mode allows the polarization to be adjusted electrically, so that only the polarized light at the user's desired angle is transmitted, eliminating reflected highlights. The images obtained using this technique are optimized by computer software. Liquid crystal polarization panels, which can electrically control the polarization angle, transmittance, and polarization rate, have been applied to polarized image monitoring device to improve subject identification in conventional CCTV.

• Journal of the Korean Society of Industry Convergence
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• v.26 no.5
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• pp.925-936
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• 2023

Currently, due to the rapid increase in power demand and the increase in capacity of power converters, the capacity of electromagnetic contactors is also increasing, and the burden on SMPS for the power that can drive them is increasing. Although the initial starting operation current of an electromagnetic contactor is significantly larger than the holding current for maintaining contact, most electromagnetic contactors apply the same voltage as the initial starting operation. An electromagnetic contactor must continuously apply a holding current to maintain the contact point, and the larger the capacity, the larger the current must be applied. This paper proposes a two-level magnetic contactor drive that allows setting the initial starting operation current to fully attach the contact point of the magnetic contactor and the holding current to maintain subsequent operation. In addition, a low-cost drive topology of analog and digital methods was proposed for various field applications, and an algorithm based on the ripple of the excitation current was proposed to determine whether the magnetic contactor was opened or closed without using a separate contact point. The feasibility of the proposed method was proven through Psim simulation experiments.

• Journal of the Korean Recycled Construction Resources Institute
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• v.12 no.1
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• pp.1-7
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• 2024

Concrete, as a porous construction material, permits chloride penetration from outside, which yields corrosion in embedded steel. In the study, an accelerated corrosion technique (ICM: Impressed current method) was adopted for rapid corrosion formation with 10 Volt of potential, and corrosion amou nt was controlled u p to 10.0 %. Corrosion amou nt had a linear relationship with cumulative corrosion current and increased with a quadratic function of accelerating period due to cracking. Regarding bond strength test, OPC concrete showed rapid drop of bond strength over 3.0 % of corrosion weight ratio, however slag concrete with 30 % replacement ratio showed a level of 51.4~71.6 % of corrosion ratio to OPC concrete with keeping residual bond strength.

• Journal of the Korean Society of Radiology
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• v.6 no.1
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• pp.73-77
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• 2012

Recently, Interest to the photoconductor, which is used to flat form X-ray detector such as a-Se, $HgI_2$, PbO, CdTe, $PbI_2$ etc. is increasing. In this study, the film layer by using the photoconductive material with particle sedimentation was fabricated and evaluated. The quantization efficiency of the continuous X-ray with the 70 kVp energy bandwidth was analyzed by using the Monte Carlo simulation. With the results, the thickness of film with 64 % quantization efficiency was 180 ${\mu}m$ which is similar to the efficiency of 500 ${\mu}m$ a-Se film. And $HIg_2$ film has the high quantization efficiency of 74 % on 240 ${\mu}m$ thickness. The electrical characteristics of the 239 ${\mu}m$ $Hgl_2$ films produced by particle sedimentation were shown as very low dark current(under 10 $pA/mm^2$), and high sensitivity(19.8 mC/mR-sec) with 1 $V/{\mu}m$ input voltage. The SNR, which is influence to the contrast of X-ray image, was shown highly as 3,125 in low driving voltage on 0.8 $V/{\mu}m$. With the results of this study, the development of the low-cost, high-performance image detector with film could be possible by replacing the film produced by particle sedimentation instead to a-Se detector.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.31 no.1
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• pp.8-15
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• 2021

TiO2 has been used in various fields such as solar cells, dental implants, and photocatalysis, because it has high physical and chemical stability and is harmless to the body. TiO2 nanofibers which have a large specific surface area also show a good reactivity in bio-friendly products and excellent photocatalysis in air and water purification. To fabricate TiO2 nanofibers, an electrospinning method was used. To observe the diameter of TiO2 nanofibers with fabrication variables, the fabrication variables was divided into precursor composition variables and process variables and microstructure was analyzed. The concentrations of PVP (Polyvinylpyrrolidone) and TTIP (Titanium(IV) isopropoxide) were selected as precursor composition variables, and inflow velocity and voltage were also selected as process variables. Microstructure and crystal structure of TiO2 nanofibers were analyzed using FE-SEM (Field emission scanning electron microscope) and XRD (X-ray diffraction), respectively. As-spun TiO2 nanofibers with an average diameter of about 0.27 ㎛ to 1.31 ㎛ were transformed to anatase TiO2 nanofibers with an average diameter of about 0.22 ㎛ to 0.78 ㎛ after heat treatment of 3 hours at 450℃. Anatase TiO2 nanofibers with an average diameter of 0.22 ㎛ can be expected to improve the photocatalytic properties by increasing the specific surface area. To change the average diameter of TiO2 nanofibers, the control of precursor composition variables such as concentrations of PVP and TTIP is more efficient than the control of electrospinning process variables such as inflow velocity and voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.48-57
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• 2006

This work describes a 12b 200KHz 0.52mA $0.47mm^2$ algorithmic ADC for sensor applications such as motor controls, 3-phase power controls, and CMOS image sensors simultaneously requiring ultra-low power and small size. The proposed ADC is based on the conventional algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. The input SHA with eight input channels for high integration employs a folded-cascode architecture to achieve a required DC gain and a sufficient phase margin. A signal insensitive 3-D fully symmetrical layout with critical signal lines shielded reduces the capacitor and device mismatch of the MDAC. The improved switched bias power-reduction techniques reduce the power consumption of analog amplifiers. Current and voltage references are integrated on the chip with optional off-chip voltage references for low glitch noise. The employed down-sampling clock signal selects the sampling rate of 200KS/s or 10KS/s with a reduced power depending on applications. The prototype ADC in a 0.18um n-well 1P6M CMOS technology demonstrates the measured DNL and INL within 0.76LSB and 2.47LSB. The ADC shows a maximum SNDR and SFDR of 55dB and 70dB at all sampling frequencies up to 200KS/s, respectively. The active die area is $0.47mm^2$ and the chip consumes 0.94mW at 200KS/s and 0.63mW at 10KS/s at a 1.8V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.60-68
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• 2009

This work proposes a 10b 200MS/s 65nm CMOS ADC for high-definition video systems such as HDTV requiring high resolution and fast operating speed simultaneously. The proposed ADC employs a four-step pipeline architecture to minimize power consumption and chip area. The input SHA based on four capacitors reduces the output signal range from $1.4V_{p-p}$ to $1.0V_{p-p}$ considering high input signal levels at a low supply voltage of 1.2V. The proposed three-stage amplifiers in the input SHA and MDAC1 overcome the low output resistance problem as commonly observed in a 65nm CMOS process. The proposed multipath frequency-compensation technique enables the conventional RNMC based three-stage amplifiers to achieve a stable operation at a high sampling rate of 200MS/s. The conventional switched-bias power-reduction technique in the sub-ranging flash ADCs further reduces power consumption while the reference generator integrated on chip with optional off-chip reference voltages allows versatile system a locations. The prototype ADC in a 65nm CMOS technology demonstrates a measured DNL and INL within 0.19LSB and 0.61LSB, respectively. The ADC shows a maximum SNDR of 54.BdB and 52.4dB and a maximum SFDR of 72.9dB and 64.8dB at 150MS/S and 200MS/s, respectively. The proposed ADC occupies an active die area of $0.76mm^2$ and consumes 75.6mW at a 1.2V supply voltage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.75-85
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• 2009

This work proposes a 13b 100MS/s 0.13um CMOS ADC for 3G communication systems such as two-carrier W-CDMA applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs a four-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. Area-efficient high-speed high-resolution gate-bootstrapping circuits are implemented at the sampling switches of the input SHA to maintain signal linearity over the Nyquist rate even at a 1.0V supply operation. The cascode compensation technique on a low-impedance path implemented in the two-stage amplifiers of the SHA and MDAC simultaneously achieves the required operation speed and phase margin with more reduced power consumption than the Miller compensation technique. Low-glitch dynamic latches in sub-ranging flash ADCs reduce kickback-noise referred to the differential input stage of the comparator by isolating the input stage from output nodes to improve system accuracy. The proposed low-noise current and voltage references based on triple negative T.C. circuits are employed on chip with optional off-chip reference voltages. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.70LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 64.5dB and a maximum SFDR of 78.0dB at 100MS/s, respectively. The ABC with an active die area of $1.22mm^2$ consumes 42.0mW at 100MS/s and a 1.2V supply, corresponding to a FOM of 0.31pJ/conv-step.