• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.11
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• pp.2009-2014
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• 2017

A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.10
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• pp.1935-1940
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• 2016

This paper proposes a phase-locked loop (PLL) to minimize the loop filter output voltage fluctuation by using a comparator including RC time constant circuits. The voltage variation of loop filter is inputted to RC time constant circuits which have two RC time constants, large and small. While a small RC time constant circuit quickly conveys the output voltage variation of loop filter, a large RC time constant circuit conveys slowly the output voltage variation of loop filter and its output looks like constant voltage. The output signal of the comparator controls the sub charge pump and reduces the input voltage variation of voltage-controlled oscillator (VCO). Therefore, the proposed PLL generates a phase noise reduced signal. It has been designed with a 1.8V supply voltage, 0.18um multi - metal and multi - poly layer CMOS process and proved by Hspice simulation.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.133-138
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• 2017

This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The signal through a small RC time constant circuit has almost same loop filter output voltage. The signal through a large RC time constant circuit has the average value of loop filter output voltage and does as a role of reference voltage to the comparator. The output of the comparator controls the sub-charge pump which provide a current to LPF. When the loop filter output voltage increases, the sub-charge pump discharges the loop filter and decreases loop filter output voltage. When the loop filter output voltage decreases, the sub-charge pump charges the loop filter and increases loop filter output voltage. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.

• Proceedings of the KIPE Conference
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• 2015.11a
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• pp.141-142
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• 2015

본 논문에서는 동기 좌표계 비례 적분(PI) 전류 제어기의 이득 산정에 따른 계통 외란 발생 시 제어기의 응답 특성을 연구하였다. PI 전류 제어기의 이득 선정 시 플랜트의 시정수와 적분기 시정수를 같게 설정하는 극점-영점 상쇄 기법을 사용하여 전류 제어 특성을 결정할 수 있다. 그러나 극점-영점 상쇄 기법을 통해 이득이 선정된 전류 제어기는 계통에 외란 발생시 제어기 응답 특성이 느려진다. 적분기 시정수를 샘플링 주기를 이용하여 선정한다면 계통 외란에 강인한 특성을 갖게 된다. 제안된 방법은 각각 선정된 적분기 시정수를 가지고 외란에 대한 주파수 응답 특성과 데드 타임이 추가된 계통연계형 인버터 시뮬레이션 결과를 비교 분석하여 제안된 적분기 시정 수 선정 방법이 외란에 더 강인함을 검증하였다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.05a
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• pp.197-199
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• 2017

This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.

• Proceedings of the KAIS Fall Conference
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• 2009.05a
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• pp.709-712
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• 2009

대부분의 고속도로 안개경고시스템은 시정측정을 위해 고가의 광학센서를 사용하고 있으나 운전자의 시정감각과 유사하면서도 비교적 저가인 CCTV를 이용한 시정측정에 관한 연구가 활발히 이루어지고 있다. 그러나 대부분의 CCTV를 이용한 시정측정 방법은 ROI를 기반으로 하고 있어 설치가 까다롭고 기존 CCTV를 활용하기 어렵다는 문제점을 가지고 있다. 본 논문에서는 고속도로상의 안개경고는 약 1~2Km이내의 시정일 때 발생되며, 눈으로 물체를 식별할 수 있는 최대거리가 시정이라는 기초적인 개념에 근거하여 고속도로 안개경고시스템에 사용될 수 있는 Non-ROI 기반의 실시간 CCTV 시정측정 방법을 제안한다. 이를 위해 본 논문에서는 고속도로상에 주행중인 차량의 실시간 이동영역과 가시선을 검출하고 카메라와 도로간의 상관관계를 나타내는 도로모델을 이용하여 시정측정을 수행하는 방법을 제시한다. 제안된 방법은 1~2Km 이내의 시정측정을 위한 방법으로 ROI가 필요없고 직관적이고 현실적인 주야간 시정측정이 가능하며 기존의 고속도로 CCTV에 바로 적용할 수 있다는 장점이 있다.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.11
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• pp.123-129
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• 2016

Disturbance Observer(DOB) based control is considered for the purpose of the balancing performance enhancement in a single-wheel robot. Design of DOB can be folded into two parts, the inverse model of the plant and the Q-filter. The inverse model is derived from the inverted stick model and a Q-filter is designed to stabilize the inverse model. In this paper, a Q31 filter is designed and its effect is evaluated by experimental studies. The time constant provides a complimentary characteristic between the disturbance suppression and the sensor noise immunity. Therefore, suitable selection of the time-constant must be considered. Comparative experiments are conducted to investigate the control performances when three different Q filters are respectively applied in the DOB. Through the analysis of the experimental results, a time constant is designed to have a proper value in the design of DOB for balancing control of a single-wheel robot.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.1353-1354
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• 2015

본 연구에서는 관측자료 기반의 안개 예보를 수행하기 위해 특징선택을 이용한 SVR 회귀분석 기반 시정 예측 가이던스를 개발하였다. 예측에 필요인자를 사전에 선택하는 유전알고리즘 기반의 최적화 방법을 적용하여, 관측된 여러 기상인자의 입력인자 중 실제 시정을 예측하기 위한 입력인자를 선택하여 준다. 지점별 안개발생에 필요한 입력인자 및 예측 모델을 구성하여 통합적인 예측 모델이 아닌 각 지점에 최적화된 정보를 제공할 수 있도록 예측을 수행한다. 자료의 수집 특성상 3시간 간격으로 3시간 예보를 위한 시정을 예측하고, 예측 모델의 검증을 위해 현업의 수치모델 기반의 시정예측 정보와의 비교를 통해 실제 안개 시점에 대해 비교 분석하였고 그 결과를 통해 긍정적인 효과를 보였다. 예측모델을 적용하여 지도에 예측시정 정보를 제공하는 표출 시스템을 통해 실시간 가이던스를 제공하고자 연구를 수행하였다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.2
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• pp.487-492
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• 2000

This paper presents a novel method of slip-compensation for rotor time constant variation in indirect field orientation control of induction motor drives. In field oriented control due to variation of rotor time constant, decoupling between the flux and torque components of stator current is lost and hence, the performance of operation of the machine deteriorates. To solve the problem, the q-axis is aligned to reference frame without phase difference by comparing the real flux component with the reference flux component. Then to compensate the slip, PI controller is used. The proposed method keeps a constant slip by compensating the gain of direct slip frequency when the rotor resistance of induction motor varies. To prove the validations of the proposed algorithm in the paper, computer simulations and experiments are executed.

• Journal of the Korean Magnetics Society
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• v.12 no.2
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• pp.68-72
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• 2002

In this research, the effects of capacitance to the access time were studied at the junction area of tunneling magnetoresistance when these were used as memory devices. These results were obtained by applying electric signal input and magnetic field was not used. We applied bipolar square waves of 1MHz to the MTJ samples to obtain the results and time constant ($\tau$) calculated by observing wave responses utilizing an oscilloscope. And time constant was compared with junction area. Each part of MTJ sample, such as electrical pad, lead and contact area, was modeled as an electrical equivalent circuit based on experimental results. For the 200㎛$\times$200㎛ cell, junction capacitance was 90 pF. Also, measurement and simulation results were compared, which showed those similarity.