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http://dx.doi.org/10.5573/ieie.2017.54.2.133

A Jitter Characteristic Improved PLL with RC Time Constant Circuit  

An, Seong-Jin (Department of Electronic Engineering, PKNU University)
Choi, Yong-Shig (Department of Electronic Engineering, PKNU University)
Publication Information
Journal of the Institute of Electronics and Information Engineers / v.54, no.2, 2017 , pp. 133-138 More about this Journal
Abstract
This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The signal through a small RC time constant circuit has almost same loop filter output voltage. The signal through a large RC time constant circuit has the average value of loop filter output voltage and does as a role of reference voltage to the comparator. The output of the comparator controls the sub-charge pump which provide a current to LPF. When the loop filter output voltage increases, the sub-charge pump discharges the loop filter and decreases loop filter output voltage. When the loop filter output voltage decreases, the sub-charge pump charges the loop filter and increases loop filter output voltage. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.
Keywords
Jitter; PLL; time constant comparator; sub-charge pump; voltage fluctuation;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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