• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.145.2-145.2
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• 2014

최근 반도체 산업의 급속한 발전으로 반도체 생산 설비 시설 또한 꾸준히 증설되어가는 추세이다. 이에 따라 반도체 산업의 핵심기술로 부각되고 있는 진공 기술은 다양한 응용목적을 위한 진공시스템 설계와 운영을 필요로 한다. 진공시스템의 알맞은 설계는 시스템 구성에 따른 진공특성을 예측하는 것이 중요하며 목적에 부합한 진공펌프를 선택하고 운영하여 최소비용으로 시스템 활용효율성을 극대화할 수 있는 설계를 해야 한다. 또한 공정의 저전력, 대유량화 추세에 따라 고유량 영역의 드라이펌프 부하 내구성 대응 요구에 부응하는 객관적 내구성평가의 정립 및 표준 측정 시험평가 방법의 필요성이 점차 대두되고 있는 경향에 있다. 본 연구에서는 드라이펌프의 공정현장 적응능력 평가를 위하여 최소 1시간에서 3시간동안 압력별 가스부하에 따른 드라이펌프의 실시간 특성을 관찰하였다. 실험은 1 mbar에서 최대 300 mbar까지의 연속적인 부하 조건에서 유량, 진동, 소음, 소비전력과 Sudden Vent Test를 실시간으로 측정하였고 드라이펌프의 특성 분석은 각 용량별 압력에 따른 유량, DP BP 소비전력, 소음, 진동, DP Body Temperature 등의 데이터를 Type에 따라 비교 분석하였다. 이에 부응하는 평가 장치 구축 및 데이터분석은 한국표준과학연구원 진공펌프 평가실험실에서 수행되었다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.775-777
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• 2016

In this paper presents an analysis of pulsed radiation effects of unit devices. Unit devices are the nMOSFET, pMOSFET, NPN Transistor and those fabricated by the 0.18um CMOS process. Pulsed radiation test results in nMOSFET, the photocurrent of tens nA was generated in $2.07{\times}10^8rad(si)/s$. For the pMOSFET, a photocurrent generation was not observed in $3{\times}10^8rad(si)/s$. For the NPN transistor, the photocurrent was generated with about 1uA. Therefore, the MOSFET must be used than BJT transistor when radhard IC design.

• Journal of the Semiconductor & Display Technology
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• v.18 no.4
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• pp.92-95
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• 2019

Automation control and the data for control of industrial equipment for the diagnosis and prediction is a key to success in the 4th industrial revolution. It increases process efficiency and productivity through data collection, realtime monitoring, and the data analysis. However, university and research environment are still suffering from logging the data in manual way, and we occasionally loss the equipment data logging due to the lack of automatic data logging system. State variable presents the current condition of the equipment operation which is closely related to process result, and it is valuable to monitor and analyze the data for the equipment health monitoring. In this paper, we demonstrate the collection of equipment state variable data via programmable logic controller (PLC) and the visualization of the collected data over the Web access supervisory control and data acquisition (SCADA). Test vehicle for the implementation of the suggested SCADA system is a relay switched physical vapor deposition system in the university environment.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2009.10a
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• pp.288-289
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• 2009

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2013.05a
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• pp.485-486
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• 2013

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2009.10a
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• pp.67-68
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• 2009

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.108-111
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• 2000

The electrical characteristics of MQFP packages have been measured in RF regime. The s-parameter of the lead frame has been measured using the test fixture on which the do-capped package was mounted. A simple lumped equivalent circuit modeling of the lead frame and the test fixture can provide reasonable model parameters up to the frequency of 200 MHz.

• Journal of Industrial Technology
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• v.9
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• pp.109-117
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• 1989

In the finite element analysis of semiconductor devices analysis, the solution often be diverged due to the numerical instability of discretized equations. To overcome this problems, a noble finite element code which guarantees a successful convergence is developed. The factor of divergence in the current continuity equation of semiconductor governing equations is derived using stability test and an adaptive mesh refine scheme is introduced to eliminates the divergence properties. A test calculation of GaAs MESFET model reveals that the proposed scheme has a robust self-convergence property and is suitable for the semiconductor devices analysis.

• Journal of the Semiconductor & Display Technology
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• v.20 no.1
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• pp.25-31
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• 2021

The semiconductor and display equipment demands an ultra-fine precision of several nm to several ㎛, and the scale is getting smaller due to the explosive development. The manufacturing process equipment for such products with ultra-fine precision is very sensitive to ultra-small vibrations flowing from the floor, resulting in problems of production defects and yield degradation. The vibration criteria are a standard that regulates the vibration environment of the floor where such precision process equipment will be installed. The BBN vibration criteria defined the allowable vibration velocity level in the frequency domain with a flat and inclined line and presented a rating according to it. However, the actual vibration criteria have appeared with various magnitudes in the frequency domain according to the dynamic characteristics of individual equipment. In this study, the relationship between the relative motion of two major points in the equipment and the vibration magnitude of the floor is presented using the frequency response function of a simple 3-DOF model. It is describing the magnitudes according to the frequency of the floor vibration that guarantees the allowable relative motion and this can be used as the vibration criteria. In order to obtain the vibration criteria experimentally a method of extracting through a modal test was introduced and verified analytically. It provides vulnerable frequency and magnitude to floor vibration in consideration of the dynamic characteristics of individual equipment. And it is possible to know necessary to improve the dynamic characteristics of the equipment, and it can be used to check the vibration compatibility of the place where the equipment will be installed.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.68 no.2
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• pp.364-369
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• 2019

Generally, since memory chips should be tested all, considering its volume, the reduction in test time for detecting faults plays an important role in reducing the overall production cost. The parallel testing of chips in one ATE is a competitive solution to solve it. In this paper, NOC is proposed as test interface architecture between DUTs and ATE. Because NOC can be extended freely, there is no limit on the number of DUTs tested at the same time. Thus, more memory can be tested with the same bandwidth of ATE. Furthermore, the proposed NOC-based parallel test method can increase the efficiency of channel usage by packet type data transmission.