• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.683-685
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• 2012

This paper have presented the analysis of the change for threshold voltage and drain induced barrier lowering among short channel effects occurred in subthreshold region for double gate(DG) MOSFET with two gates to be next-generation devices, based on scaling theory. To obtain the analytical solution of Poisson's equation, Gaussian function been used as carrier distribution to analyze closely for experimental results, and the threshold characteristics have been analyzed for device parameters such as channel thickness and doping concentration and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold chatacteristics. As a result to apply scaling theory, we know the threshold voltage and drain induced barrier lowering is changed, and the deviation rate is changed for device parameters for DGMOSFET.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.11
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• pp.2373-2377
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• 2009

In this paper, the threshold voltage characteristics have been analyzed using three dimensional Poisson's equation for FinFET. The FinFET is extensively been studing since it can reduce the short channel effects as the nano device. We have presented the short channel effects such as subthreshold swing and threshold voltage for PinFET, using the analytical three dimensional Poisson's equation. We have analyzed for channel length, thickness and width to consider the structural characteristics for FinFET. Using this model, the subthreshold swing and threshold voltage have been analyzed for FinFET since the potential and transport model of this analytical three dimensional Poisson's equation is verified as comparing with those of the numerical three dimensional Poisson's equation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.1
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• pp.145-150
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• 2013

This paper has presented the analysis for threshold voltage and drain induced barrier lowering among short channel effects occurred in subthreshold region for double gate(DG) MOSFET as next-generation devices, based on scaling theory. To obtain the analytical solution of Poisson's equation, Gaussian function has been used as carrier distribution to analyze closely for experimental results, and the threshold characteristics have been analyzed for device parameters such as channel thickness and doping concentration and projected range and standard projected deviation of Gaussian function. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold characteristics. As a result to apply scaling theory, we know the threshold voltage and drain induced barrier lowering are changed, and the deviation rate is changed for device parameters for DGMOSFET.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.928-930
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• 2009

In this paper, the threshold voltage characteristics have been alanyzed using three dimensional Poisson's equation for FinFET. The FinFET is extensively been studing since it can reduce the short channel effects as the nano device. We have presented the short channel effects such as subthreshold swing and threshold voltage for FinFET, using the analytical three dimensional Poisson's equation. We have analyzed for channel length, thickness and width to consider the structural characteristics for FinFET. Using this model, the subthreshold swing and threshold voltage have been analyzed for FinFET since the potential and transport model of this analytical three dimensional Poisson's equation is verified as comparing with those of the numerical three dimensional Poisson's equation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.6
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• pp.1422-1428
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• 2014

This paper has analyzed threshold voltage roll-off for bottom gate voltages of asymmetric double gate(DG) MOSFET. Since the asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates, the bottom gate voltage influences on threshold voltage. It is, therefore, investigated how the threshold voltage roll-off known as short channel effects is reduced with bottom gate voltage. In the pursuit of this purpose, off-current model is presented in the subthreshold region, and the threshold voltage roll-off is observed for channel length and thickness with a parameter of bottom gate voltage as threshold voltage is defined by top gate voltage that off-currnt is $10^{-7}A/{\mu}m$ per channel width. As a result to observe the threshold voltage roll-off for bottom gate voltage using this model, we know the bottom gate voltage greatly influences on threshold voltage roll-off voltages, especially in the region of short channel length and thickness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.4
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• pp.747-752
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• 2009

Three dimensional(3D) Poisson's equation is used to calculate the potential variation for FinFET in the channel to analyze subthreshold current and short channel effect(SCE). The analytical model has been presented to lessen calculating time and understand the relationship of parameters. The accuracy of this model has been verified by the data from 3D numerical device simulator and variation for dimension parameters has been explained. The model has been developed to obtain channel potential of FinFET according to channel doping and to calculate subthreshold current and threshold voltage.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.579-582
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• 2008

Three dimensional(3D) Poisson's equation is used to calculate the potential variation in the channel to analyze subthreshold current and short channel effect(SCE). The analytical model has been presented to lessen calculating time and understand the relationship of parameters. The accuracy of this model has been verified by the data from 3D numerical device simulator and variation for dimension and process parameters has been explained. The model has been developed to obtain channel potential of FinFET according to channel doping and to calculate subthreshold current and threshold voltage.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.05a
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• pp.741-744
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• 2014

This paper has analyzed threshold voltage roll-off for bottom gate voltages of asymmetric double gate(DG) MOSFET. Since the asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates, the bottom gate voltage influences on threshold voltage. It is, therefore, investigated how the threshold voltage roll-off known as short channel effects is reduced with bottom gate voltage. In the pursuit of this purpose, off-current model is presented in the subthreshold region, and the threshold voltage roll-off is observed for channel length and thickness with a parameter of bottom gate voltage as threshold voltage is defined by top gate voltage that off-currnt is $10^{-7}A/{\mu}m$ per channel width. As a result to observe the threshold voltage roll-off for bottom gate voltage using this model, we know the bottom gate voltage greatly influences on threshold voltage roll-off voltages, especially in the region of short channel length and thickness.

• Journal of IKEEE
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• v.23 no.1
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• pp.29-34
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• 2019

We investigated on-off voltage ${\Delta}V_{on-off}$ of sub-10 nm JLCSG (Junctionless Cylindrical Surrounding Gate) MOSFET. The gate voltage was defined as ON voltage for the subthreshold current of $10^{-7}A$ and OFF voltage for the subthreshold current of $10^{-12}A$, and the difference between ON and OFF voltage was obtained. Since the tunneling current was not negligible at 10 nm or less, we observe the change of ${\Delta}V_{on-off}$ depending on the presence or absence of the tunneling current. For this purpose, the potential distribution in the channel was calculated using the Poisson equation and the tunneling current was calculated using the WKB approximation. As a result, it was found that ${\Delta}V_{on-off}$ was increased due to the tunneling current in JLCSG MOSFETs below 10 nm. Especially, it increased rapidly with channel lengths less than 8 nm and increased with increasing channel radius and oxide thickness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.1
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• pp.135-141
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• 2014

In this paper, the device design guideline to reduce the threshold voltage variation with fin width in junctionless MuGFET has been suggested. It has been observed that the threshold voltage variation was increased with increase of fin width in junctionless MuGFETs. To reduce the threshold voltage variation with fin width in junctionless MuGFETs, 3-dimensional device simulation with different gate dielectric materials, silicon film thickness, and an optimized fin number has been performed. The simulation results showed that the threshold voltage variation can be reduced by the gate dielectric materials with a high dielectric constant such as $La_2O_3$ and the silicon film with ultra-thin thickness even though the fin width is increased. Particularly, the reduction of the threshold voltage variation and the subthreshold slope by reducing the fin width and increasing the fin numbers is known the optimized device design guideline in junctionless MuGFETs.