1 |
P.K. Tiwari, S. Kumar, S. Mittal, V. Srivastava, U. Pandey and S. Jit, "A 2D Analytical Model of the Channel Potential and Threshold Voltage of Double-Gate(DG) MOSFETs with Vertical Gaussian Doping Profile," India, 14-16th Mar., IMPACT-2009, pp.52-55, 2009.
|
2 |
D. S.Havaldar, G. Katti, N. DasGupta and A. DasGupta, "Subthreshold Current Model of FinFETs Based on Analytical Solution of 3-D Poisson's Equation," IEEE Trans. Electron Devices, vol. 53, no.4, 2006.
|
3 |
Z.Ding, G.Hu, J.Gu, R.Liu, L.Wang and T.Tang,"An analytical model for channel potential and subthreshold swing of the symmetric and asymmetric double-gate MOSFETs," Microelectronics J., vol.42, pp.515-519, 2011.
DOI
ScienceOn
|
4 |
H.K.Jung,"Analysis for Potential Distribution of Asymmetric Double Gate MOSFET Using Series Function," J. Korea Inst. Inf. Commun. Eng., vol.17, no.11, pp.2621-2626, 2013.
DOI
ScienceOn
|
5 |
http://www.samsung.com/sec/news/presskit/3d-v-nand
|
6 |
P.Zhang, E.Jacques, R.Rogel and O.Bonnaud, "P-type and N-type multi gate polycrystalline silicon vertical thin film transistors based on low-temperature technology," Solid-State Electronics, vol.86, no.1, pp.1-5, 2013.
DOI
ScienceOn
|
7 |
G.Deng and C.Chen,"Binary Multiplication Using Hybrid MOS and Multi-gate Single-Electron Transistors," IEEE trans. on very large scale integration(VLSI) systems, vol.21, no.9, pp.1573-1582, 2013.
DOI
ScienceOn
|
8 |
A.Sengupta and C.K.Sarkar,"Surface potential based analytical modeling of double gate MOSFET with Si and Au nano-dots embedded gate dielectric for non-volatile memory applications," J. of Computational and Theoretical Nanoscience, vol.10, no.4, pp.906-913, 2013.
DOI
|
9 |
TCAD Manual, Part.4: INSPEC, ISE Integrated Systems Engineering AG, Zurich, Switzerland, 2001, p.56. ver.7.5.
|