• Journal of Sensor Science and Technology
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• v.14 no.6
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• pp.430-437
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• 2005

In this paper, we proposed a biologically inspired light-adaptive edge detection circuit based on the human retina. A saturating resistive network was suggested for light adaptation and simulated by using HSPICE. The light adaptation mechanism of the edge detection circuit was quantitatively analyzed by using a simple model of the saturating resistive element. A light-adaptive capability of the edge detection circuit was confirmed by using the one-dimensional array of the 128 pixels with various levels of input light intensity. Experimental data of the saturating resistive element was compared with the simulated results. The entire capability of the edge detection circuit, implemented with the saturating resistive network, was investigated through the two-dimensional array of the $64{\times}64$ pixels

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1996.03a
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• pp.24-29
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• 1996

The seniconductor, which is precision product, requires many inspection processes. The surface conditions of the semiconductor chip effect on the functions of the semiconductors. The defects of the chip surface is crack or void. Because general inspection method requires many inspection processes, the inspection system which searches immediately and preciselythe defects of the semiconductor chip surface. We propose the inspection method by using the computer vision system. This study presents an image processing algorithm for inspecting the surface defects(crack, void)of the semiconductor test samples. The proposed image processing algorithm aims to reduce inspection time, and to analyze those experienced operator. This paper regards the chip surface as random texture, and deals with the image modeling of randon texture image for searching the surface defects. For texture modeling, we consider the relation of a pixel and neighborhood pixels as noncasul model and extract the statistical characteristics from the radom texture field by using the 2D AR model(Aut oregressive). This paper regards on image as the output of linear system, and considers the fidelity or intelligibility criteria for measuring the quality of an image or the performance of the processing techinque. This study utilizes the variance of prediction error which is computed by substituting the gary level of pixel of another texture field into the two dimensional AR(autoregressive model)model fitted to the texture field, estimate the parameter us-ing the PAA(parameter adaptation algorithm) and design the defect detection filter. Later, we next try to study the defect detection search algorithm.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.47 no.6
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• pp.80-85
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• 2010

BGA 409 chip currently the most as a visual inspection of the exterior inspection is conducted. Human depending on visual inspection of the exterior inspection of the current state of testers, depending on how the test results because the change is difficult to expect reliable results. Therefore, the challenges of visual inspection of BGA solder balls to improve the visual inspection technique was developed. However, BGA solder ball size of the microstructure and the characteristics of the distinction between hard test the accuracy of the fall orientation error has a problem. In this paper BGA solder balls exterior inspection of the accuracy to improve the edge detection algorithm, the complement of features and only the comparison proposed a pattern-matching techniques, based on the characteristics of spatial configuration of the area by improving the standard error of the orientation proposed improvements.

• Journal of Sensor Science and Technology
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• v.6 no.2
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• pp.123-130
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• 1997

In this paper, we present an original stereo vision system which comprises two process: 1. An image segmentation algorithm based on new concept called declivity and using automatic thresholds. 2. A new stereo matching algorithm based on an optimal path search. This path is obtained by dynamic programming method which uses the threshold values calculated during the segmentation process. At present, a complete depth map of indoor scene only needs about 3 s on a Sun workstation IPX, and this time will be reduced to a few tenth of second on a specialised architecture based on several DSPs which is currently under consideration.

• Journal of the Institute of Convergence Signal Processing
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• v.10 no.2
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• pp.120-126
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• 2009

There are many different types of surface defects on semiconductor Integrated Chips (IC's) caused by various factors during manufacturing process, such as cracks, foreign materials, chip-outs, chips, and voids. These defects must be detected and classified by an inspection system for productivity improvement and effective process control. Among defects, in particular, foreign materials and chips are the most difficult ones to classify accurately. A vision system composed of a carefully designed optical system and a processing algorithm is proposed to detect and classify the defects on QFN(Quad Flat No-leads) packages. The processing algorithm uses features derived from the defect's position and brightness value in the Maximum Likelihood classifier and the optical system is designed to effectively extract the features used in the classifier. In experiments we confirm that this method gives more effective result in classifying foreign materials and chips.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.1
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• pp.156-160
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• 2011

This paper describes the design and implementation of a System-on-a-Chip (SoC) for pattern recognition to use in embedded applications. The target Soc consists of LEON2 core, AMBA/APB bus-systems and custom-designed accelerators for Gaussian Pyramid construction, lighting compensation and histogram equalization. A new FPGA-based prototyping platform is implemented and used for design and verification of the target SoC. To ensure that the implemented SoC satisfies the required performances, a pattern recognition application is performed.

• 전자공학회논문지 IE
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• v.43 no.3
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• pp.6-12
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• 2006

This paper described an 8bit, 100Msample/s CMOS D/A converter using a glitch-time minimization technique for the high-speed sampling rate of 100MHz level. The proposed DAC was implemented in $0.35{\mu}m$ Hynix CMOS technology and adopts a current mode architecture to optimize sampling rate, resolution, chip area. The DAC linear characteristics was similar to the proposed specification and the prototype error between DNL and INL is less than $\pm$0.09LSB respectively. Also, the manufactured DAC chip was analyzed the cause of error operation and proposed the field considerations for chip test.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.10
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• pp.998-1004
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• 2008

In this paper, a visual servoing control technique of humanoid robot arms is implemented for tracking a moving object. An embedded time-delayed controller is designed on an FPGA(Programmable field gate array) chip and implemented to control humanoid robot arms. The position of the moving object is detected by a stereo vision camera and converted to joint commands through the inverse kinematics. Then the robot arm performs visual servoing control to track a moving object in real time fashion. Experimental studies are conducted and results demonstrate the feasibility of the visual feedback control method for a moving object tracking task by the humanoid robot arms called the ROBOKER.

• Journal of Sensor Science and Technology
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• v.32 no.5
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• pp.320-327
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• 2023

In this study, an FPGA-based sealer inspection system was developed to inspect the sealer applied to install vehicle glass on a car body. The sealer is a liquid or paste-like material that promotes adhesion such as sealing and waterproofing for mounting and assembling vehicle parts to a car body. The system installed in the existing vehicle design parts line does not detect the sealer in the glass rotation section and takes a long time to process. This study developed a line laser camera sensor and an FPGA vision signal processing module to solve this problem. The line laser camera sensor was developed such that the resolution and speed of the camera for data acquisition could be modified according to the irradiation angle of the laser. Furthermore, it was developed considering the mountability of the entire system to prevent interference with the sealer ejection machine. In addition, a vision signal processing module was developed using the Zynq-7020 FPGA chip to improve the processing speed of the algorithm that converted the profile to the sealer shape image acquired from a 2D camera and calculated the width and height of the sealer using the converted profile. The performance of the developed sealer application inspection system was verified by establishing an experimental environment identical to that of an actual automobile production line. The experimental results confirmed the performance of the sealer application inspection at a level that satisfied the requirements of automotive field standards.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.04a
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• pp.3-7
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• 2000

In summary, a fundamentally new paradigm called System-on-Package could potentially become a complementary alternative to System-on-Chip, thus providing a balanced set of system-level functions between the semiconductor IC and single component package beyond the year 2007. The concurrent engineering and optimization of IC and package could overcome the fundamental IC issues presented above.