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http://dx.doi.org/10.5370/KIEE.2011.60.1.156

Design and Implementation of Hardware for various vision applications  

Yang, Keun-Tak (제주대학교 전산통계학과)
Lee, Bong-Kyu (제주대학교 전산통계학과)
Publication Information
The Transactions of The Korean Institute of Electrical Engineers / v.60, no.1, 2011 , pp. 156-160 More about this Journal
Abstract
This paper describes the design and implementation of a System-on-a-Chip (SoC) for pattern recognition to use in embedded applications. The target Soc consists of LEON2 core, AMBA/APB bus-systems and custom-designed accelerators for Gaussian Pyramid construction, lighting compensation and histogram equalization. A new FPGA-based prototyping platform is implemented and used for design and verification of the target SoC. To ensure that the implemented SoC satisfies the required performances, a pattern recognition application is performed.
Keywords
iSoC (System-on-a-chip); LEON2; Pyramid; Preprocessor; FPGA;
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