• 한국재료학회:학술대회논문집
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• 한국재료학회 1998년도 IUMRS-ICEM ABSTRACT BOOK
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• pp.100.1-100
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• 1998

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 추계 기술심포지움
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• pp.134-137
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• 2001

The cure kinetics of a cycloalipatic epoxy / anhydride / Co(II) system for a no-flow underfill encapsulant, has been studied by using a differential scanning calorimetry(DSC) under isothermal and dynamic conditions over the temperature range of $160^{\circ}C ~220^{\circ}C$. The kinetic analysis was carried out by fitting dynamic/isothermal heating experimental data to the kinetic expressions to determine the reaction parameters, such as order of reaction and reaction constants. Diffusion-controlled reaction has been observed as the cure conversion increases and successfully analyzed by incorporating the diffusion control term into the rate equation. The prediction of reaction rates by the model equation corresponded well to experimental data at all temperature.

• 한국정밀공학회지
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• 제22권8호
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• pp.100-107
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• 2005

The objective of the study is to improve the quality of wheel bearing hub by the rigid-plastic finite element analysis and the response surface methodology. The rigid-plastic finite element codes, AFDEX-2D and DEFORM-3D, were used to analyze the two-dimensional and three-dimensional forging processes, respectively. The response surface analysis is used to find the minimum underfill by the variation of design variables such as the height of billet after upsetting and punch angles of blocker dies. The metal flow of forged product shows good agreement with the results from 2D and 3D analysis. Also, the quality of the wheel bearing hub has been improved by the optimization of design variables and the machining time has been reduced by the machining allowance.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2004년도 ISMP Pb-free solders and the PCB technologies related to Pb-free solders
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• pp.243-255
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• 2004

• 마이크로전자및패키징학회지
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• 제22권2호
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• pp.55-59
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• 2015

Novel low-volume solder-on-pad (SoP) process is proposed for a fine pitch Cu pillar bump interconnection. A novel solder bumping material (SBM) has been developed for the $60{\mu}m$ pitch SoP using screen printing process. SBM, which is composed of ternary Sn-3.0Ag-0.5Cu (SAC305) solder powder and a polymer resin, is a paste material to perform a fine-pitch SoP in place of the electroplating process. By optimizing the volumetric ratio of the resin, deoxidizing agent, and SAC305 solder powder; the oxide layers on the solder powder and Cu pads are successfully removed during the bumping process without additional treatment or equipment. The Si chip and substrate with daisy-chain pattern are fabricated to develop the fine pitch SoP process and evaluate the fine-pitch interconnection. The fabricated Si substrate has 6724 under bump metallization (UBM) with a $45{\mu}m$ diameter and $60{\mu}m$ pitch. The Si chip with Cu pillar bump is flip chip bonded with the SoP formed substrate using an underfill material with fluxing features. Using the fluxing underfill material is advantageous since it eliminates the flux cleaning process and capillary flow process of underfill. The optimized interconnection process has been validated by the electrical characterization of the daisy-chain pattern. This work is the first report on a successful operation of a fine-pitch SoP and micro bump interconnection using a screen printing process.

• 반도체디스플레이기술학회지
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• 제15권4호
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• pp.10-15
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• 2016

In this paper, novel ball grid array (BGA) interconnection process using solderable anisotropic conductive adhesives (SACAs) with low-melting-point alloy (LMPA) fillers have been developed to enhance the processability in the conventional capillary underfill technique and to overcome the limitations in the no-flow underfill technique. To confirm the feasibility of the proposed technique, BGA interconnection test was performed using two types of SACA with different LMPA concentration (0 and 4 vol%). After the interconnection process, the interconnection characteristics such as morphology of conduction path and electrical properties of BGA assemblies were inspected and compared. The results indicated that BGA assemblies using SACA without LMPA fillers showed weak conduction path formation such as solder bump loss or short circuit formation because of the expansion of air bubbles within the interconnection area due to the relatively high reflow peak temperature. Meanwhile, assemblies using SACA with 4 vol% LMPAs showed stable metallurgical interconnection formation and electrical resistance due to the favorable selective wetting behavior of molten LMPAs for the solder bump and Cu metallization.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2006년도 ISMP 2006
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• pp.67-73
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• 2006

A system in package (SiP) generally contains a variety of systems such as analog, digital, optical and micro-electro-mechanical systems, integrated in a system-level package connected through a substrate. However, there are many electrical and mechanical reliability issues including the reliability issue for embedded structures. A mismatch of thermal coefficients of expansion among packaging materials and devices can lead to warping or delamination in the package. In this study, the effect of material properties of underfill, such as Young's modulus and CTE, are investigated through FEM simulation. Experimental investigation on the warpage of the package is also carried out to verify the simulation results. The results show that the reliability of the system in package is closely related to the material properties of underfill. The results of this study provide a good guidance for the material selection when designing the system in package.

• 한국정밀공학회지
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• 제20권10호
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• pp.183-190
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• 2003

Major device failures such as die cracking, interfacial delamination and warpage in flip chip packages are due to excessive heat and thermal gradients- There have been significant researches toward understanding the thermal performance of electronic packages, but the majority of these studies do not take into account the combined effects of thermo-mechanical interactions of the different package constituents. This paper investigates the thermo-mechanical performance of flip chip package constituents based on the finite element method with thermo-mechanically coupled elements. Delaminations with different lengths between the silicon die and underfill resin interfaces were introduced to simulate the defects induced during the assembly processes. The temperature gradient fields and the corresponding stress distributions were analyzed and the results were compared with isothermal case. Parametric studies have been conducted with varying thermal conductivities of the package components, substrate board configurations. Compared with the uniform temperature distribution model, the model considering the temperature gradients provided more accurate stress profiles in the solder interconnections and underfill fillet. The packages with prescribed delaminations resulted in significant changes in stress in the solder. From the parametric study, the coefficients of thermal expansion and the package configurations played significant roles in determining the stress level over the entire package, although they showed little influence on stresses profile within the individual components. These observations have been implemented to the multi-board layer chip scale packages (CSP), and its results are discussed.

• ETRI Journal
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• 제38권6호
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• pp.1163-1171
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• 2016

Integration technologies involving flexible substrates are receiving significant attention owing the appearance of new products regarding wearable and Internet of Things technologies. There has been a continuous demand from the industry for a reliable bonding method applicable to a low-temperature process and flexible substrates. Up to now, however, an anisotropic conductive film (ACF) has been predominantly used in applications involving flexible substrates; we therefore suggest low-temperature lead-free soldering and bonding processes as a possible alternative for flex-on-flex applications. Test vehicles were designed on polyimide flexible substrates (FPCBs) to measure the contact resistances. Solder bumping was carried out using a solder-on-pad process with Solder Bump Maker based on Sn58Bi for low-temperature applications. In addition, thermocompression bonding of FPCBs was successfully demonstrated within the temperature of $150^{\circ}C$ using a newly developed fluxing underfill material with fluxing and curing capabilities at low temperature. The same FPCBs were bonded using commercially available ACFs in order to compare the joint properties with those of a joint formed using solder and an underfill. Both of the interconnections formed with Sn58Bi and ACF were examined through a contact resistance measurement, an $85^{\circ}C$ and 85% reliability test, and an SEM cross-sectional analysis.

• 마이크로전자및패키징학회지
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• 제9권3호
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• pp.31-36
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• 2002

PBGA에 비해 상대적으로 큰 칩을 실장하는 고속 SRAM용 153 FC-BGA을 대상으로 2차 솔더접합부의 신뢰성을 평가하였다. 실험은 열사이클 시험에서 발생하는 단면과 양면 실장, 패키지 구조, 언더 필 재료, 기판의 종류와 두께, 솔더 볼의 크기에 따른 영향을 분석하였다. BT기판의 두께가 0.95mm에서 1.20mm로 증가하고, 낮은 영률 의 언더 필 재료에서 솔더접합부의 피로 수명이 30% 향상됨을 확인하였다. 또한 솔더 볼의 크기가 0.76 mm에서 0.89mm로 증가하면, 솔더접합부에서 균열에 대한 저항성은 2배 정도 증가하였다.