• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.3
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• pp.479-485
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• 2006

The double gate(DG) MOSFET is a promising candidate to further extend the CMOS scaling and provide better control of short channel effect(SCE). DGMOSFETs, having ultra thin undoped Si channel for SCEs control, ale being validated for sub-20nm scaling. A novel analytical transport model for the subthreshold mode of DGMOSFETs is proposed in this paper. The model enables analysis of short channel effect such as the subthreshold swing(SS), the threshold voltage roil-off$({\Delta}V_{th})$ and the drain induced barrier lowering(DIBL). The proposed model includes the effects of thermionic emission and quantum tunneling of carriers through the source-drain barrier. An approximative solution of the 2D Poisson equation is used for the distribution of electric potential, and Wentzel-Kramers-Brillouin approximation is used for the tunneling probability. The new model is used to investigate the subthreshold characteristics of a double gate MOSFET having the gate length in the nanometer range $(5-20{\sim}nm)$ with ultra thin gate oxide and channel thickness. The model is verified by comparing the subthreshold swing and the threshold voltage roll-off with 2D numerical simulations. The proposed model is used to design contours for gate length, channel thickness, and gate oxide thickness.

• Journal of the Korean Magnetics Society
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• v.15 no.4
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• pp.231-235
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• 2005

We studied the microstructural evolution of ZrTM-Al (TM=Nb and Ti) alloy films, MR and electrical properties of the MTJ with $ZrTM-AlO_x$ barrier as a function of Zr/TM ratio. We observed that the ternary-oxide barrier reduced the TMR ratio due mainly to the structural defects such as the surface roughness. The change in TMR ratio and $V_h$ with Zr/TM ratio exactly corresponds to the systematic changes in the microstructural variation. Although the MTJ with ternary oxide reduced the TMR and the electrical stabilities, the junction resistances decreased as the Ti and Nb concentration increased due to the band-gap reduction caused by the formation of extra bands

• Bulletin of the Korean Chemical Society
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• v.35 no.2
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• pp.494-500
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• 2014

Indium-doped zinc oxide nanocrystals (IZO NCs), capped with stearic acid (SA) of different sizes, were synthesized using a hot injection method in a noncoordinating solvent 1-octadecene (ODE). The ligand exchange process was employed to modify the surface of IZO NCs by replacing the longer-chain ligand of stearic acid with the shorter-chain ligand of butylamine (BA). It should be noted that the ligand-exchange percentage was observed to be 75%. The change of particle size, morphology, and crystal structures were obtained using a field emission scanning electron microscope (FE-SEM) and X-ray diffraction pattern results. In our study, the 5 nm and 10 nm IZO NCs capped with stearic acid (SA-IZO) were ligand-exchanged with butylamine (BA), and were then spin-coated on a thermal oxide ($SiO_2$) gate insulator to fabricate a thin film transistor (TFT) device. The films were then annealed at various temperatures: $350^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, and $600^{\circ}C$. All samples showed semiconducting behavior and exhibited n-channel TFT. Curing temperature dependent on mobility was observed. Interestingly, mobility decreases with the increasing size of NCs from 5 to 10 nm. Miller-Abrahams hopping formalism was employed to explain the hopping mechanism insight our IZO NC films. By focusing on the effect of size, different curing temperatures, electron coupling, tunneling rate, and inter-NC separation, we found that the decrease in electron mobility for larger NCs was due to smaller electronic coupling.

• Journal of the Korean Magnetics Society
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• v.16 no.2
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• pp.136-139
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• 2006

The tunneling magnetoresistance (TMR) ratios of magnetic tunnel junctions (MTJs), in general, decrease abruptly above 250$^{\circ}C$ due to Mn interdiffusion from an antiferromagnet IrMn layer to a ferromagnetic CoFe and/or a tunnel barrier. To improve thermal stability, we prepared MTJs with nano-oxide layers. Using a MTJ structure consisting of underlayer CoNbZr 4/bufferlayer CoFe 10/antiferromaget IrMn 7.5/pinned layer CoFe 3/tunnel barrier AlO/freelayer CoFe 3/capping CoNbZr 2 (nm), we placed a nano-oxide layer (NOL) into the underlayer or bufferlayer. Then, the thermal, structural and magneto-electric properties were measured. The TMR ratio, surface flatness, and thermal stability of the MTJs with NOLs were promoted.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.126-126
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• 2016

Understanding adsorption behavior organic molecules at oxide surfaces is very important for the application of organic-inorganic hybrid materials. Recently, monoethanolamine (MEA) adsorbed on $TiO_2$ surface has received great interests because it can lower the work function of $TiO_2$ in photo-electronic devices such as OLED and solar cells. In this study, we investigated the role of surface defects in adsorption behaviors of MEA at the rutile $TiO_2$ (110) surface by combined study of scanning tunneling microscopy and density functional theory calculations. Our results revealed that oxygen vacancy is the most stable adsorption site for MEA on $TiO_2$ (110) surface at low coverage. As coverage increases, the oxygen vacancies are occupied with the molecules and MEA molecules start to adsorb at Ti rows at higher coverages. Our results show that the defects at oxide surfaces and the intermolecular interactions are important factors for determining stable adsorption structure of MEA at $TiO_2$ (110) surfaces.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.9
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• pp.1648-1653
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• 2006

In this paper, transport characteristics have been investigated using analytical current-voltage model for double gate MOSFET(DGMOSFET). Scaling down to 100nm of gate length for MOSFET can bring about various problems such as a threshold voltage roll-off and increasing off current by tunneling since thickness of oxide is down by 1.fnm and doping concentration is increased. A current-voltage characteristics have been calculated according to changing of channel length,using analytical current-voltage relation. The analytical model has been verified by calculating I-V relation according to changing of oxide thickness and channel thickness as well as channel length. A current-voltage characteristics also have been compared and analyzed for operating temperature. When gate voltage is 2V, it is shown that a current-voltage characteristic in 77K is superior to in room temperature.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.9
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• pp.56-63
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• 1997

There generally exists a large variation in the thereshold voltages of the flash EEPROM cells after they are erased by using th fowler-nordheim tunneling, thereby getting some cells to be overeased. If the overerased cells are programmed with the conventional one-step programming scheme where an 12-13V pulse with the duration of 100.mu.S is applie don the control gate for the programming, they can suffer from the significant degradation of the reliability of the gate oxide. A two-step programming schem, where an 8/12 V pulse with a duration of 50.mu.S for each voltage is applied on the control gate for the programming, has been studied to solve the problem. The experimental results hav eshown that there is little difference in the programming characteristics between those two schemes, whereas the degradation of the gate oxide due to the programming can be significantly reduced with the two-step programming scheme compared to that with the one-step programming scheme. This is possibly because the positive charge stored in the floating gate of the overerased cells is compensate dwith the electrons injected into the floating gate while the 8V pulse is applied on the control gate, which leaves the overerased cells in the normally erased state after the duration of the 8V pulse.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.8
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• pp.688-693
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• 2001

A series of Fe/CeO$_2$/Fe$_{75}$Co$_{25}$ tunnel junctions (Magnetic Tunnel Junction, MTJ) having CeO$_2$ barrier layers from 30 to 90$\AA$ in thickness were prepared by ion beam sputtering (IBS) method. In order to compare the properties of MTJs, Fe/Al oxide/Fe-Co tunnel junctions were also prepared. Some junctions with a CeO$_2$ barrier layer showed the ferromagnetic tunneling effect and the highest MR ratio at room temperature was 5%. The electric resistance of junctions with a CeO$_2$ barrier layer was higher that that of junctions with an Al oxide barrier. On the other hand, The interface analysis of the Fe/CeO$_2$ bilayer was conducted by means of X-ray photoelectron spectroscopy (XPS). It was found that CeO$_2$ was decomposed to Ce and $O_2$ during sputtering, and Fe was oxidized with these decomposed $O_2$ molecules. The reduction of both electric resistance and MR ratio may be associated with the decomposed Ce in the barrier layer.r.r.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.4
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• pp.300-304
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• 2008

A novel characterization method was investigated to estimate the trap generation during the program /erase cycles in nand flash memory cell. Utilizing Fowler-Nordheim tunneling current, floating gate potential and oxide electric field, we established a quantitative model which allows the knowledge of threshold voltage (Vth) as a function of either program or erase operation time. Based on our model, the derived results proved that interface trap density (Nit) term is only included in the program operation equation, while both Nit and oxide trap density (Not) term are included in the erase operation equation. The effectiveness of our model was tested using 50 nm nand flash memory cell with floating gate type. Nit and Not were extracted through the analysis of Program/Erase speed with respect to the endurance cycle. Trap generation and cycle numbers showed the power dependency. Finally, with the measurement of the experiment concerning the variation of cell Vth with respect to program/erase cycles, we obtained the novel quantitative model which shows similar results of relationship between experimental values and extracted ones.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.75-78
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• 1998

The SONOSFET Shows low operation voltage, high cell density, anti good endurance due to modified Fowler-Nordheim tunneling as memory charge injection method. In this paper, therefore, the NOR-type Flash EEPROM composed of SONOSFET, which has fast lead operation speed and Random Access characteristics, is proposed. An 8${\times}$8 bit NOR-type SONOSFET Flash EEPROM had been designed and its electrical characteristics were verified. Read/Write/Erase operations of it were verified with the spice parameters of SONOSFETs which had Oxide-Nitride-Oxide thickness of 65${\AA}$-165${\AA}$-35${\AA}$ and that of scaled down as 33${\AA}$-53${\AA}$-22${\AA}$, respectively. When the memory window of the scaled-down SONOSFET with 8V operation was similar to that of the SONOSFET with 13V operation, the Read operation delay times of the scaled-down SONOSFET were 25.4ns at erase state and 32.6ns at program state, respectively, and those of the SONOSFET were 23.5ns at erase state and 28.2ns at program state, respectively.