• Proceedings of the IEEK Conference
• /
• 2002.06b
• /
• pp.217-220
• /
• 2002

In this paper, we have investigated electronical chara-cteristics of power LDMOSFETS having different ex-tended gate lengths(1.B${\mu}{\textrm}{m}$, 2.4${\mu}{\textrm}{m}$, 3.O${\mu}{\textrm}{m}$) in the temperature range of 300k-500K. The results of this study indicate that on-resistance, breakdown voltage increase with temperature. and drain current, threshold voltage, transconductance decrease with temperature. Particular the facts, we observed that Le is the more increase, on-resistance is the more decrease. because every conditions are fixed normal states, only change the Le. As a result, Ron/BV, known for a figure of merit of power device, increase with temperature.

• Proceedings of the IEEK Conference
• /
• 2002.07b
• /
• pp.759-762
• /
• 2002

In this paper, a voltage-controlled linear variable resistor (VCLVR) using a floating-gate MOS-FET (FG-MOSFET) is proposed. The proposed-circuit is the grounded VCLVR consists of only an ordinary MOSFET and an FG-MOSFET. The advantage of the proposed VCLVR are low-voltage and wide-input range. Next, as applications, a floating-node voltage controlled variable resistor and an operational transconductance amplifier using the proposed VCLVRs are proposed. The performance of the proposed circuits are characterized through HSPICE simulations with a standard 0.6 ${\mu}$m CMOS process. simulations of the proposed VCLVR demonstrate a resistance value of 40 k$\Omega$ to 338 k$\Omega$ and a THD of less than 1.1 %.

• Proceedings of the IEEK Conference
• /
• 2002.06b
• /
• pp.249-252
• /
• 2002

we have studied the characteristics of PHEMT's with gate recess etching method. The DC characterization of PHTMT fabricated with the wide single recess methods is a maximum drain current density of 319.4 ㎃/mm and a peak transconductance of 336.7 ㎳/mm. The RF measurements were obtained in the frequency range of 1~50GHz. At 50GHz, 3.69dB of 521 gain were obtained and a current gain cut-off frequency(f$_{T}$) of 113 CH and a maximum frequency of oscillation(f$_{max}$) of 172 Ghz were achieved from this device. On the other hand, a maximum drain current of 367 mA/mm, a peak transconduclancc of 504.6 mS/mm, S$_{21}$ gain of 2.94 dB, a current gain cut-off frequency(f$_{T}$) of 101 CH and a maximum frequency of oscillation(f$_{max}$) of 113 fa were achieved from the PHEMT's fabricated by the .narrow single recess methods.methods.

• Proceedings of the IEEK Conference
• /
• 2002.06b
• /
• pp.133-136
• /
• 2002

This paper discusses the design of a sample-and -hold amplifier(SHA) that has a 12-bit resolution with a 100 MS/s speed. The sample-and-hold amplifier uses the open-loop architecture with hold-mode feedthrough cancellation for high accuracy and high sampling speed. The designed SHA is composed of input buffer, sampling switch, and output buffer with additional amplifier for offset cancellation Hard Ware. The input buffer is implemented with folded-cascode type operational transconductance Amplifier(OTA), and sampling switch is implemented with switched source follower(SSF). A spurious free dynamic range (SFDR) of this circuit is 72.6 dB al 100 MS/s. Input signal dynamic range is 1 Vpp differential. Power consumption is 65 ㎽.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.1077-1080
• /
• 2003

This paper show the measured result of electrical characteristics of SOI-LDMOSFET that is one of the high voltage devises. Especially, we observed changes of breakdown voltage, threshold voltage, on-resistance, drain current, and transconductance in accordance with drift length, main parameter of LDMOSFET. Also, we achieved reliability analysis about device operation in high temperature environment because LDMOS is applied to smart power IC.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.683-686
• /
• 2003

In this paper, we have investigated electrical characteristics of TRENCH GATE POWER MOSFET in the temperature range of 300K to 500K. The results of this study indicate that on-resistance and breakdown voltage increase with the temperature ,but drain current, threshold voltage and transconductance decrease with the temperature. Especially, it is observed that electrical characteristics are improved as numerical unit cells are increased.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.32A no.1
• /
• pp.185-192
• /
• 1995

In this study, very fine photoresist pattern was examined using the image reversal process. And very fine photoriesist pattern (less than 0.2um) was obtsined by optimizing the exposure and reversal baking condition of photoresist. The produced pattern does not show the loss of thickness, and has a sparp negative edge profile. also, the ion implanted 0.25um T-shaped gate MESFET was fabricated using this resist pattern and the directional evaporation of gate metal. The fabricated MESFET has the maximum transconductance of 302 mS/mm, and the threshold voltage of -1.8V, and the drain saturation current of this MESFET was 191 mA/mm.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.6 no.3
• /
• pp.182-188
• /
• 2006

An artificial neural network model for the microwave characteristics of an InGaAs/InP hemt for 70 nm gate length has been developed. The small-signal microwave parameters have been evaluated to determine the transconductance and drain-conductance. We have further investigated the frequency characteristics of the device. The neural network training have been done using the three layer architecture using Levenberg-Marqaurdt Backpropagation algorithm. The results have been compared with the experimental data, which shows a close agreement and the validity of our proposed model.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.29A no.2
• /
• pp.77-79
• /
• 1992

We propose a self-aligned and double recessed technique for GaAs power MESFETs application. The gate length and the wide recess width are defined by a selective removal of the SiN layer using reactive ion etching(RIE) while the depth of the channel is defined by chemical etching of GaAs layers. The threshold voltages and the saturation drain voltage could be sucessfully controlled using this technique. The lateral-etched distance increases with the dry etching time and the source-drain breakdown voltage of MESFET increases up to about 30V at a pinch-off condition. The electrical characteristics of a MESFET with a gate length of 2 x10S0-6Tm and a source-gate spacing of 33 x10S0-6Tm show maximum transconductance of 120 mS/mm and saturation drain current density of 170-190mA/mm at a gate voltage of 0.8V.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.13 no.6
• /
• pp.551-555
• /
• 2013

Linearity characteristics of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) have been compared with those of high-k-only and $SiO_2$-only TFETs in terms of IIP3 and P1dB. It has been observed that the optimized HG TFETs have higher IIP3 and P1dB than high-k-only and $SiO_2$-only TFETs. It is because HG TFETs show higher transconductance ($g_m$) and current drivability than $SiO_2$-only TFETs and $g_m$ less sensitive to gate voltage than high-k-only TFETs.