• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.263-267
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• 2014

Super junction trench gate power MOSFETs have been receiving attention in terms of the trade-off between breakdown voltage and on-resistance. The vertical structure of super junction trench gate power MOSFETs allows the on-resistance to be reduced compared with conventional Trench Gate Power MOSFETs. The heat release of devices is also decreased with the reduction of on-resistance. In this paper, Lattice Temperature of two devices, Trench Gate Power MOSFET and Super junction trench gate power MOSFET, are compared in several temperature circumstance with the same Breakdown Voltage and Cell-pitch. The devices were designed by 100V Breakdown voltage and measured from 250K Lattice Temperature. We have tried to investigate how much temperature rise in the same condition. According as temperature gap between top of devices and bottom of devices, Super junction trench gate power MOSFET has a tendency to generate lower heat release than Trench Gate Power MOSFET. This means that Super junction trench gate power MOSFET is superior for wide-temperature range operation. When trench etching process is applied for making P-pillar region, trench angle factor is also important component. Depending on trench angle, characteristics of Super junction device are changed. In this paper, we focus temperature characteristic as changing trench angle factor. Consequently, Trench angle factor don't have a great effect on temperature change.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.651-653
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• 2008

In this paper, we report electrical properties of OTFTs by using ink-jet printing with polyvinylphenol (PVP) for gate insulator and bis(triisopropylsilylenthynyl) pentacene (TIPS pentacene) for semiconductor. OTFTs produced the excellent performance with the mobility of $1.27\;cm^2/V.s$ for top contact structure(TCS) and inverter consisting of two OTFTs exhibited the gain of 6.75.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1313-1316
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• 2005

In the present paper, it was investigated that adhesion layer on gate insulator could affect the electrical characteristics for the organic thin film transistors (OTFTs). The polyimide (PI) as organic adhesion layer was fabricated by using the vapor deposition polymerization (VDP) processing . It was found that electrical characteristics improved comparing OTFTs using adhesion layer to another. We researched adhesion layer as a function of thickness. For inverted-staggered top contact structure, field effect mobility, threshold voltage, and on-off current ratio of OTFTs using adhesion layer of PI 15 nm thickness on the gate insulator with a thickness of 0.2 ${\mu}m$ were about 0.5 $cm^2/Vs$, -0.8 V, and $10^6$, respectively.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2013.05a
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• pp.97-97
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• 2013

We present a comprehensive study on the integration of h-BN with silicon MOSFET. Temperature dependent mobility modeling is used to discern the effects of top-gate dielectric on carrier transport and identify limiting factors of the system. The result indicates that coulomb scattering and surface roughness scattering are the dominant scattering mechanisms for silicon MOSFETs at relatively low temperature. Interposing a layer of h-BN between $SiO_2$ and Si effectively weakens coulomb scattering by separating carriers in the silicon inversion layer from the charged centers as 2-dimensional h-BN is relatively inert and is expected to be free of dangling bonds or surface charge traps owing to the strong, in-plane, ionic bonding of the planar hexagonal lattice structure, thus leading to a significant improvement in mobility relative to undecorated system. Furthermore, the atomically planar surface of h-BN also suppresses surface roughness scattering in this Si MOSFET system, resulting in a monotonously increasing mobility curve along with gate voltage, which is different from the traditional one with a extremum in a certain voltage. Alternatively, high-k dielectrics can lead to enhanced transport properties through dielectric screening. Modeling indicates that we can achieve even higher mobility by using h-BN decorated $HfO_2$ as gate dielectric in silicon MOSFETs instead of h-BN decorated $SiO_2$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.164-169
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• 2008

The effects of the antisite related defects on the electronic structure of silica and the gate leakage current have been investigated using first-principles calculations. Energy levels related to the antisite defects in silicon dioxide have been introduced into the bandgap, which are nearly 2.0 eV from the top of the valence band. Combining with the electronic structures calculated from first-principles simulations, tunneling currents through the silica layer with antisite defects have been calculated. The tunneling current calculations show that the hole tunneling currents assisted by the antisite defects will be dominant at low oxide field whereas the electron direct tunneling current will be dominant at high oxide field. With increased thickness of the defect layer, the threshold point where the hole tunneling current assisted by antisite defects in silica is equal to the electron direct tunneling current extends to higher oxide field.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.3
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• pp.581-586
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• 2015

This paper has analyzed the variation of subthreshold swing for the ratio of channel length and thickness for asymmetric double gate MOSFET. The asymmetric double gate MOSFET has the advantage that the factors to control the short channel effects increase since top and bottom gate structure can be fabricated differently. The degradation of transport property due to rapid increase of subthreshold swing can be specially reduced in the case of reduction of channel length. However, channel thickness has to be reduced for decrease of channel length from scaling theory. The ratio of channel length vs. thickness becomes the most important factor to determine subthreshold swing. To analyze hermeneutically subthreshold swing, the analytical potential distribution is derived from Poisson's equation, and conduction path and subthreshold swing are calculated for various channel length and thickness. As a result, we know conduction path and subthreshold swing are changed for the ratio of channel length vs. thickness.

• Journal of Information Display
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• v.4 no.2
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• pp.1-6
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• 2003

In this paper, we demonstrate that the organic electrophosphorescent device is driven by the organic thin film transistor with spin-coated photoacryl gate insulator. It was found that electrical output characteristics in our organic thin film transistors using the staggered-inverted top-contact structure showed the non-saturated slope in the saturation region and the sub-threshold nonlinearity in the triode region, where we obtained the maximum power luminance that was about 90 $cd/m^2$. Field effect mobility, threshold voltage, and on-off current ratio in 0.45 ${\mu}m$ thick gate dielectric layer were 0.17 $cm^2/Vs$, -7 V, and $10^6$ , respectively. In order to form polyimide as a gate insulator, vapor deposition polymerization process was also introduced instead of spin-coating process, where polyimide film was co-deposited by high-vacuum thermal evaporation from 4,4'-oxydiphthalic anhydride (ODPA) and 4,4'-oxydianiline (ODA) and cured at 150${\sqsubset}$for 1hr. It was also found that field effect mobility, threshold voltage, on-off current ratio, and sub-threshold slope with 0.45 ${\mu}m$ thick gate dielectric films were 0.134 $cm^2/Vs$, -7 V, and $10^6$ A/A, and 1 V/decade, respectively.

• Journal of the Microelectronics and Packaging Society
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• v.10 no.2
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• pp.49-54
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• 2003

We have investigated the effects of hydrogen annealing on the physical and electrical properties of $SrBi_{2}Ta_{2}O_9(SBT)$ thin films in the Pt/SBT/Si (MFS) structure and Pt/SBT/Pt (MFM) one, respectively. The microstructure and electrical characteristics of the SBT films were deteriorated after hydrogen annealing due to the damage of the SBT films during the annealing process. To investigate the reason of the degradation of the SBT films in this work, in particular, the effect of the Pt top electrodes, SBT thin films deposited on Si, Pt, respectively, were annealed with the same process conditions. From the XRD, XPS, P-V, and C-V data, it was seen that the SBT itself was degraded after $H_2$ annealing even without the Pt top electrodes. In addition, the degradation of the SBT films after $H_2$ annealing was accelerated by the catalytic reaction of the Pt top electrodes which is so-called hydrogen degradation. To prevent this phenomenon, we proposed the alternative top electrode material, i.e. Ir, and the electrical properties of the SBT thin films were examined in the $Ir/IrO_2/SBT/IrO_2$ structures before and after the H$_2$ annealing and recovery heat-treatment processes. From the results of the P-V measurement, it could be concluded that Ir is one of the promising candidate as the electrode material for degradation resistance in the MFM structure using SBT thin films.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.1568-1570
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• 2008

In this paper, fabrication of a $60{\times}48$ polymer TFT array with a top-gate structure on plastic substrates using a low temperature printing process will be presented and the device structure and manufacturing processes will be discussed. The polymer TFT array showed excellent air stability and uniform electrical characteristics over a large area. Finally, a 1.5 inch EPD display with 50 dpi resolution using the polymer TFT array will be demonstrated for e-film device applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1994.05a
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• pp.127-129
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• 1994

For scale-down EEPROM, MONOS structures with the different thicknesses of gate insulators, are fabricated and the memory characteristics, such as swtching and retention characteristics are investigated. As a results, the devices with the top oxide of 20A thick were deteriorated in retentivity. However, 11V-programmable voltage for ΔV$\sub$FB/=4V and 10-year data retention were achieved in MONOS structure with the t7p oxide of 50 ${\AA}$ thick and nitride 45${\AA}$thick.