• Journal of the Korean Ceramic Society
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• v.52 no.3
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• pp.224-227
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• 2015

In this work, the properties of Indium-Zinc-Tin-Oxide (IZTO) thin films, deposited on polyethylene naphthalate (PEN) with a $SiO_2$ buffer layer, were analyzed with different working pressures. After depositing the $SiO_2$ buffer layer on PEN substrates by plasma-enhanced chemical vapor deposition (PECVD), the IZTO thin films were deposited by RF magnetron sputtering with 1 to 7-mTorr working pressure. All the IZTO thin films show an amorphous structure, regardless of the working pressure. The best morphological, electrical, and optical properties are obtained at 3-mTorr working pressure, with a surface roughness of 2.112-nm, a sheet resistance of $8.87-{\Omega}/sq$, and a transmittance at 550-nm of 88.44%. These results indicate that IZTO thin films deposited on PEN have outstanding electrical and optical properties, and the PEN plastic substrate is a suitable material for display devices.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.465-465
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• 2013

Inorganic 물질인 SiO2 dielectric 위에 organic dielectric PVP (4-vinyphenol)를 spin coating으로 올려, inorganic/organic dielectric 형태의 double layer구조로 High-performance amorphous indiumgallium zinc oxide thin-film transistors (IGZO TFT)를 제작하여 보았다. SiO2 dielectric을 buffer layer로 80 nm, PVP는 10Wt% 400 nm로 구성하였으며, 200 nm single SiO2 dielectric과 동일한 수준의 leakage current 특성을 MIM Capacitor 구조를 통해서 확인할 수 있었다. 이 소자의 장점은 용액공정의 도입으로 공정 시간의 단축 및 원가 절감을 이룰 수 있으며, dielectric과 channel 사이의 균일한 interface의 형성으로 interface trap 개선 및 Yield 향상의 장점을 갖는다. 우리는 실험을 통해서 SiO2 buffer layer가 수직 electric field에 의한 leakage current을 제어하고, PVP dielectric은 interface를 개선하는 것을 확인하였다. Vth의 negative shift 및 slope의 향상으로 구동전압이 줄어들고, 균일한 I-V Curve 형성을 통해서 Process Yield의 향상을 확인하였다.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.121.2-121.2
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• 2011

Aluminum-doped Zinc Oxide (AZO) is considered as an excellent candidate to replace Indium Tin Oxide (ITO), which is widely used as transparent conductive oxide (TCO) for electronic devices such as liquid crystal displays (LCDs), organic light emitting diodes (OLEDs) and organic solar cells (OSCs). In the present study, AZO thin film was applied to the transparent electrode of a channel-shaped flexible organic solar cell using a low-temperature selective-area atomic layer deposition (ALD) process. AZO thin films were deposited on Poly-Ethylene-Naphthalate (PEN) substrates with Di-Ethyl-Zinc (DEZ) and Tri-Methyl-Aluminum (TMA) as precursors and $H_2O$ as an oxidant for the atomic layer deposition at the deposition temperature of $130^{\circ}C$. The pulse time of TMA, DEZ and $H_2O$, and purge time were 0.1 second and 20 second, respectively. The electrical and optical properties of the AZO films were characterized as a function of film thickness. The 300 nm-thick AZO film grown on a PEN substrate exhibited sheet resistance of $87{\Omega}$/square and optical transmittance of 84.3% at a wavelength between 400 and 800 nm.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.543-543
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• 2013

Thin-film transistors (TFTs) based on oxide semiconductors have been regarded as promising alternatives for conventional amorphous and polycrystalline silicon TFTs. Oxide TFTs have several advantages, such as low temperature processing, transparency and high field-effect mobility. Lots of oxide semiconductors for example ZnO, SnO2, In2O3, InZnO, ZnSnO, and InGaZnO etc. have been researched. Particularly, zinc-tin oxide (ZTO) is suitable for channel layer of oxide TFTs having a high mobility that Sn in ZTO can improve the carrier transport by overlapping orbital. However, some issues related to the ZTO TFT electrical performance still remain to be resolved, such as obtaining good electrical contact between source/drain (S/D) electrodes and active channel layer. In this study, the bottom-gate type ZTO TFTs with staggered structure were prepared. Thin films of ZTO (40 nm thick) were deposited by DC magnetron sputtering and performed at room temperature in an Ar atmosphere with an oxygen partial pressure of 10%. After annealing the thin films of ZTO at $400^{\circ}C$ or an hour, Cu, Mo, ITO and Ti electrodes were used for the S/D electrodes. Cu, Mo, ITO and Ti (200 nm thick) were also deposited by DC magnetron sputtering at room temperature. The channel layer and S/D electrodes were defined using a lift-off process which resulted in a fixed width W of 100 ${\mu}m$ and channel length L varied from 10 to 50 ${\mu}m$. The TFT source/drain series resistance, the intrinsic mobility (${\mu}i$), and intrinsic threshold voltage (Vi) were extracted by transmission line method (TLM) using a series of TFTs with different channel lengths. And the performances of ZTO TFTs were measured by using HP 4145B semiconductor analyzer. The results showed that the Cu S/D electrodes had a high intrinsic field effect mobility and a low effective contact resistance compared to other electrodes such as Mo, ITO and Ti.

• Journal of the Korean Physical Society
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• v.73 no.12
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• pp.1867-1872
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• 2018

This study proposes a route for surface modification for p-type cobalt oxide-based gas sensors. We deposit a thin layer of Ni on the Co oxide film by sputtering process and annealed at $350^{\circ}C$ for 15 min in air, which changes a typical sputtered film surface into one interlaced with a high density of hemispherical nanoparticles. Our in-depth materials characterization using transmission electron microscopy discloses that the microstructure evolution is the result of an extensive inter-diffusion of Co and Ni, and that the nanoparticles are nickel oxide dissolving some Co. Sensor performance measurement unfolds that the surface modification results in a significant sensitivity enhancement, nearly 200% increase for toluene (at $250^{\circ}C$) and CO (at $200^{\circ}C$) gases in comparison with the undoped samples.

• Transactions on Electrical and Electronic Materials
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• v.9 no.6
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• pp.247-250
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• 2008

Hafnium dioxide ($HfO_2$) thin film as a gate dielectric for organic thin film transistors is prepared by plasma enhanced atomic layer deposition (PEALD). Mostly crystalline of $HfO_2$ film can be obtained with oxygen plasma and with water at relatively low temperature of $200^{\circ}C$. $HfO_2$ was deposited as a uniform rate of $1.2\;A^{\circ}$/cycle. The pentacene TFT was prepared by thermal evaporation method with hafnium dioxide as a gate dielectric. The electrical properties of the OTFT were characterized.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.471-471
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• 2013

Highly stable and high performance amorphous oxide semiconductor thin film transistors (TFTs) were fabricated using 4-mercaptophenol (4MP) doped ZnO by atomic layer deposition (ALD). The 4 MP concentration in ZnO films were varied from 1.7% to 5.6% by controlling Zn: 4MP pulses. The carrier concentrations in ZnO thin films were controlled from $1.017{\times}10^{20}$/$cm^3$ to $2,903{\times}10^{14}$/$cm^3$ with appropriate amount of 4MP doping. The 4.8% 4MP doped ZnO TFT revealed good device mobility performance of $8.4cm^2V-1s-1$ and on/off current ratio of $10^6$. Such 4MP doped ZnO TFTs were stable under ambient conditions for 12 months without any apparent degradation in their electrical properties. Our result suggests that 4 MP doping can be useful technique to produce more reliable oxide semiconductor TFT.

• Transactions on Electrical and Electronic Materials
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• v.3 no.4
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• pp.27-31
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• 2002

Thin film diode with reliable interfacial structure was fabricated by using multi-step anodic oxidation. The thickness of the oxide layer was preciously controlled with anodic voltage. Also, interfacial structure between oxide layer and top electrode was improved by applying post heat-treatment. The thin film diode showed symmetric and stable I-V characteristics after the post heat-treatment.

• Transactions on Electrical and Electronic Materials
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• v.18 no.3
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• pp.141-143
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• 2017

Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.539-542
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• 2001

In SiC semiconductor device processing, it needs high temperature anneal for activation of ion implanted dopants. The macrosteps, 7~8nm in height, are formed on the surface of SiC substrates during activation anneal. We have investigated the effect of thermally-grown SiO$_2$layer on the suppression of macrostep formation during high temperature anneal. The cap oxide layer was found to be efficient for suppression of macrostep formation even though the annealing temperature is as high as the melting point of SiO$_2$. The thin cap oxide layer (10nm) was evaporated during anneal then the macrosteps were formed on SiC substrate. On the other hand the thicker cap oxide layer (50nm) remains until the anneal process ends. In that case, the surface was smoother and the macrosteps were rarely formed. The thermally-grown oxide layer is found to be a good material for the suppression of macrostep formation because of its feasibility of growing and processing. Moreover, we can choose a proper oxide thickness considering the evaporate rate of SiO$_2$at the given temperature.