Transactions on Electrical and Electronic Materials

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Enhanced Electrical Performance of SiZnSnO Thin Film Transistor with Thin Metal Layer

  • Lee, Sang Yeol (Department Semiconductor Engineering, Cheongju University)
  • Received : 2017.02.21
  • Accepted : 2017.04.22
  • Published : 2017.06.25
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Abstract

Novel structured thin film transistors (TFTs) of amorphous silicon zinc tin oxide (a-SZTO) were designed and fabricated with a thin metal layer between the source and drain electrodes. A SZTO channel was annealed at $500^{\circ}C$. A Ti/Au electrode was used on the SZTO channel. Metals are deposited between the source and drain in this novel structured TFTs. The mobility of the was improved from $14.77cm^2/Vs$ to $35.59cm^2/Vs$ simply by adopting the novel structure without changing any other processing parameters, such as annealing condition, sputtering power or processing pressure. In addition, stability was improved under the positive bias thermal stress and negative bias thermal stress applied to the novel structured TFTs. Finally, this novel structured TFT was observed to be less affected by back-channel effect.

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References

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