• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.1
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• pp.6-10
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• 2016

In this study, the effects of soft baking temperature on the solution derived ZTO (Zn-Sn-O) TFTs (thin-film transistors) as a In-free oxide semiconductor were investigated. In spite of the same hard baking at high temperature($600^{\circ}C$), the electrical properties of ZTO TFT was greatly changed by a small difference in soft baking temperature($180{\sim}250^{\circ}C$). The performance of TFT was deteriorated as the soft baking temperature increased. Therefore, it is important to remove the water-related defects well as organic impurities from the ZTO films during soft baking for fabrication of solution-derived high performance of TFTs.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.7
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• pp.525-531
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• 2011

In this paper, experimental analyses have been performed to compare the electrical characteristics of n channel LT(low temperature) and HT(high temperature) poly-Si TFTs(polycrystalline silicon thin film transistors) on quartz substrate according to activated step annealing. The size of the particles step annealed at low temperature are bigger than high temperature poly-Si TFTs and measurements show that the electric characteristics those are transconductance, threshold voltage, electric effective mobility, on and off current of step annealed at LT poly-Si TFTs are high more than HT poly-Si TFT's. Especially we can estimated the defect in the activated grade poly crystalline silicon and the grain boundary of LT poly-Si TFT have more high than HT poly-Si TFT's due to high off electric current. Even though the size of particles of step annealed at low temperature, the electrical characteristics of LT poly-Si TFTs were investigated deterioration phenomena that is decrease on/off current ratio depend on high off current due to defects in active silicon layer.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.1
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• pp.1-11
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• 1999

Hyrdogenated amorphous silicon thin film transistors are used as a pixel switching device of TFT-LCDs and very active research works on a-Si:H TFTs are in progress. Further development of the technology based on a-Si:H TFTs depends on the increased understanding of the device physics and the ability to accurately simulate the characteristics of them. A two-dimensional device simulator based on the realistic and flexible physical models can guide the device designs and their optimizations. A non-uniform finite-difference TFT Simulation Program, TFT2DS has been developed to solve the electronic transport equations for a-Si:H TFTs. In TFT2DS, many of the simplifying assumptions are removed. The developed simulator was used to calculate the transfer and output characteristics of a-Si:H TFTs. The measured data were compared with the simulated ones for verifying the validity of TFT2DS. Also the transient behaviors of a-Si:H TFTs were calculated even if the values of the related parameters are not accurately specified.

• Transactions on Electrical and Electronic Materials
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• v.12 no.5
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• pp.197-199
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• 2011

In this paper, the bottom-gate thin-film transistors (TFTs) were fabricated with an amorphous/microcrystalline Si double layer (DL) as an active layer and the variations of the electrical characteristics were investigated according to the DC bias stresses. Since the fabrication process of DL TFTs was identical to that of the conventional amorphous Si (a-Si) TFTs, it creates no additional manufacturing cost. Moreover, the amorphous/microcrystalline Si DL could possibly improve stability and mass production efficiency. Although the field effect mobility of the typical DL TFTs is similar to that of a-Si TFTs, the DL TFTs had a higher reliability with respect to the direct current (DC) bias stresses.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.87-88
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• 2006

Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TFTs performance. Transfer characteristics of p-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of 2-30 ${\mu}m$ has been investigated. In this paper, we analyzed the data of p-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current ($I_{DSAT}$), and transconductance ($g_m$) of p-channel poly-Si thin film transistors with various channel lengths and widths.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.25-26
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• 2011

In this paper, we investigated the effect of various annealing processes on the electrical characteristics of oxide thin film transistors (TFTs). When we annealed the TFT devices before and after source/drain (S/D) process, we could observe the different electrical characteristics of oxide TFTs. When we annealed the TFTs after deposition of transparent indium zinc oxide S/D electrodes, the annealing process decreased the contact resistance but increased the resistivity of S/D electrodes. The field effect mobility, subthreshold slope and threshold voltage of the oxide TFTs annealed before and after S/D process were 5.83 and 4.47 $cm^2$/Vs, 1.20 and 0.82 V/dec, and 3.92 and 8.33 V respectively. To analyze the differences, we measured the contact resistances and the carrier concentrations using transfer length method (TLM) and Hall measurement.

• Journal of Information Display
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• v.6 no.2
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• pp.16-18
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• 2005

Hybrid insulator pentacene thin film transistors (TFTs) are fabricated with thermally grown oxide and cross-linked polyvinylalcohol (PVA) including surface treatment by dilute ploymethylmethacrylate (PMMA) layer on $n^+$ doped silicon wafer. Through the optimization of $SiO_2$ layer thickness in hybrid insulator structure, carrier mobility is increased to more than 35 times than that of the TFT which has only a gate insulator of $SiO_2$ at the same electric field. The carrier mobility of $1.80cm^2$/V-s, subthreshold swing of 1.81 V/decade, and $I_{on}/I_{off}$ current ratio> $1.10{\times}10^5$ are obtained less than -30 V bias condition. The result is one of the best reported performances of pentacene TFTs with hybrid insulator including cross-linked PVA layer as a gate insulator at relatively low voltage operation.

• Korean Journal of Materials Research
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• v.28 no.4
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• pp.247-253
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• 2018

We examined the characteristics of indium tin zinc oxide (ITZO) thin film transistors (TFTs) on polyimide (PI) substrates for next-generation flexible display application. In this study, the ITZO TFT was fabricated and analyzed with a SiOx/SiNx gate insulator deposited using plasma enhanced chemical vapor deposition (PECVD) below $350^{\circ}C$. X-ray photoelectron spectroscopy (XPS) and secondary ion mass spectroscopy (SIMS) results revealed that the oxygen vacancies and impurities such as H, OH and $H_2O$ increased at ITZO/gate insulator interface. Our study suggests that the hydrogen related impurities existing in the PI and gate insulator were diffused into the channel during the fabrication process. We demonstrate that these impurities and oxygen vacancies in the ITZO channel/gate insulator may cause degradation of the electrical characteristics and bias stability. Therefore, in order to realize high performance oxide TFTs for flexible displays, it is necessary to develop a buffer layer (e.g., $Al_2O_3$) that can sufficiently prevent the diffusion of impurities into the channel.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.3-3
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• 2010

We investigated the influence of the indium content on the threshold voltage ($V_{th}$) shift of sol-gel-derived indium-gallium-zinc oxide (IGZO) thin film transistors (TFTs). Surplus indium composition ratio into IGZO decreases the value of $V_{th}$ of IGZO TFTs showed huge $V_{th}$ shift in the negative direction. $V_{th}$ shift decreases from 10 to -28.2V as Indium composition ratio is increased. Because the free electron density is increased according to variation of the Indium composition ratio.

• Current Applied Physics
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• v.18 no.11
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• pp.1300-1305
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• 2018

The tunable electronic performance of the solution-processed semiconductor metal oxide is of great significance for the printing electronics. In current work, transparent thin-film transistors (TFTs) with indium-zinc oxide (IZO) were fabricated as active layer by a simple eco-friendly aqueous route. The aqueous precursor solution is composed of water without any other organic additives and the IZO films are amorphous revealed by the X-ray diffraction (XRD). With systematic studies of atomic force microscopy (AFM), X-ray photoemission spectroscopy (XPS) and the semiconductor property characterizations, it was revealed that the electrical performance of the IZO TFTs is dependent on the concentration of precursor solution. As well, the optimum preparation process was obtained. The concentrations induced the regulation of the electronic performance was clearly demonstrated with a proposed mechanism. The results are expected to be beneficial for development of solution-processed metal oxide TFTs.