• Title/Summary/Keyword: test-per-clock

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A Study on Efficient Test Data Compression Method for Test-per-clock Scan (Test-per-clock 스캔 방식을 위한 효율적인 테스트 데이터 압축 기법에 관한 연구)

  • Park, Jae-Heung;Yang, Sun-Woong;Chang, Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.9
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    • pp.45-54
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    • 2002
  • This paper proposes serial test data compression, a novel DFT scheme for embedded cores in SOC. To reduce test data amounts, share bit compression and fault undetectable fault pattern compression techniques was used. A Circuits using serial test data compression method are derived from a scan DFT method including a test-per-clock technique. For an experiment of the proposed compression method, full scan versions of ISCASS85 and ISCASS89 were used. ATALANTA has been used for ATPG and fault simulation. The amount of test data has been reduced by maximum 98% comparing with original data.

Logic Built-In Self Test Based on Clustered Pattern Generation (패턴 집단 생성 방식을 사용한 내장형 자체 테스트 기법)

  • Kang, Yong-Suk;Kim, Hyun-Don;Seo, Il-Suk;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.7
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    • pp.81-88
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    • 2002
  • A new pattern generator of BIST based on the pattern clustering is developed. The proposed technique embeds a pre-computed deterministic test set with low hardware overhead for test-per-clock environments. The test control logic is simple and can be synthesized automatically. Experimental results for the ISCAS benchmark circuits show that the effectiveness of the new pattern generator compared to the previous methods.

OpenLDI Receiver Circuit for Flat-Panel Display Systems (평판 디스플레이 시스템을 위한 OpenLDI 수신기 회로)

  • Han, Pyung-Su;Choi, Woo-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.34-43
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    • 2008
  • An OpenLDI receiver circuit for flat-panel display systems was designed and fabricated using $1.8-{\mu}m$ high-voltage CMOS technology. Designed circuit roughly consists of DLL circuit and parallelizers, which recovers clock and parallelize data bits, respectably. It has one clock input and four data inputs. Measurement results showed that it successfully recovers clock signal from input whose frequency is $10Mhz{\sim}65Mhz$, which corresponds data rate of $70Mbps{\sim}455Mbps$ per channel, or $280Mbps{\sim}1.82Gbps$ when all of the four data channels were utilized. A commercial LCD monitor was modified into a test-bench and used for video data transmission at clock frequency of 49Mhz. In the experiment, power consumption was 19mW for core block and 82.5mW for output buffer.

The Scan-Based BIST Architecture for Considering 2-Pattern Test (2-패턴 테스트를 고려한 스캔 기반 BIST 구조)

  • 손윤식;정정화
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.10
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    • pp.45-51
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    • 2003
  • In this paper, a scan-based low power BIST (Built-In Self-Test) architecture is proposed. The proposed architecture is based on STUMPS, which uses a LFSR (Linear Feedback Shift Register) as the test generator, a MISR(Multiple Input Shift Register) as the reponse compactor, and SRL(Shift Register Latch) channels as multiple scan paths. In the proposed BIST a degenerate MISR structure is used for every SRL channel; this offers reduced area overheads and has less impact on performance than the STUMPS techniques. The proposed BIST is designed to support both test-per-clock and test-per-scan techniques, and in test-per-scan the total power consumption of the circuit can be reduced dramatically by suppressing the effects of scan data on the circuits. Results of the experiments on ISCAS 89 benchmark circuits show that this architecture is also suitable for detecting path delay faults, when the hamming distance of the data in the SRL channel is considered.

Effects of Occupational Therapy with Physical Exercise on Demented old Adult's Executive Function (신체활동 작업치료가 치매노인의 실행기능에 미치는 영향)

  • Lee, Yu-Na;Park, Ji-Hyuk;Lim, Kyung-Min
    • The Journal of the Korea Contents Association
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    • v.13 no.5
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    • pp.322-331
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    • 2013
  • The aim of this study was to investigate the effects of occupational therapy with physical exercise on executive function with dementia. For eight elderly persons with mild or moderate dementia, we executed physical exercise with group activity for 10 weeks from April to June, 2012, one times per week, and 50 minutes each time. Before and after the physical activities, the old adults were tested with Verbal Fluency Test(VFT), Trail Making Test A/B(TMT A/B), Clock Drawing Test(CDT). After the physical exercise, the subjects showed significant changes in the score of CDT(p<0.1). In contrast, there was no significant effect in VFT, TMT A. The results of this study show that occupational therapy with physical exercise program for demented elderly people is a useful therapeutic approach by enhancing the their quality of life through improving and maintaining their executive function.

Test Scheduling for Low Power BIST (저전력 BIST를 위한 테스트 스케줄링)

  • Bae, Jae-Sung;Son, Yoon-Sik;Chong, Jong-Wha
    • Proceedings of the Korea Information Processing Society Conference
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    • 2002.04a
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    • pp.635-638
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    • 2002
  • BIST(Built-In Self-Test)를 이용한 테스트 방식은 정상 동작 모드인 회로에 비해 테스트 모드에서 보다 많은 스위칭이 발생하고, 과도한 전력 소모에 의해 회로가 손상을 받을 수 있는 문제점을 갖고 있다. 본 논문은 test-per-clock BIST 구조에서 전력이 제한되어 있을 때 테스트 적용 시간과 총 에너지 소비를 최소화하기 위한 테스트 스케줄링 알고리즘을 제안한다. 제안된 방법은 테스트 세션을 구성함에 있어 각 세션에 포함되는 각 블록의 테스트 시작 시간을 동적으로 결정하여 기존의 알고리즘에 비하여 전력 소모와 전체 테스트 시간을 줄일 수 있다.

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Influences of Autonomic Function, Salivary Cortisol and Physical Activity on Cognitive Functions in Institutionalized Older Adults with Mild Cognitive Impairment: Based on Neurovisceral Integration Model (요양병원에 입원한 경도 인지장애 노인의 자율신경 기능, 타액 코티졸과 신체활동 정도가 인지기능에 미치는 영향: Neurovisceral Integration Model 기반)

  • Suh, Minhee
    • Journal of Korean Academy of Nursing
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    • v.51 no.3
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    • pp.294-304
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    • 2021
  • Purpose: This study aimed to investigate objectively measured physical activity (PA) in institutionalized older adults with mild cognitive impairment (MCI) and to elucidate the influence of autonomic nervous function, salivary cortisol, and PA on cognitive functions based on neurovisceral integration model. Methods: Overall cognitive function was evaluated using the mini-mental state examination (MMSE) and executive function was evaluated using semantic verbal fluency test and clock drawing test. Actigraph for PA, HRV and sAA for autonomous function, and the geriatric depression scale for depression were used. Saliva specimens were collected in the morning for sAA and cortisol. Results: Ninety-eight older adults from four regional geriatric hospitals participated in the study. They took 4,499 steps per day on average. They spent 753.93 minutes and 23.12 minutes on average in sedentary and moderate-to-vigorous activity, respectively. In the multiple regression analysis, lower salivary cortisol level (β = - .33, p = .041) and greater step counts (β = .37, p = .029) significantly improved MMSE score. Greater step count (β = .27, p = .016) also exerted a significant influence on verbal fluency, and greater sAA (β= .35, p = .026) was significantly associated with a better clock drawing test result. Conclusion: Salivary cortisol, sAA and physical activity were significantly associated with cognitive functions. To prevent older adults from developing dementia, strategies are needed to increase their overall PA amount by decreasing sedentary time and to decrease salivary cortisol for cognitive function, and to maintain their sympathetic nervous activity for executive function.

A Study on the Implementation of Format Converter using Median Filter (메디안 필터를 이용한 포맷 변환기 구현에 관한 연구)

  • 김현기;하기종;최영규;류기한;이천희
    • Proceedings of the IEEK Conference
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    • 2003.07b
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    • pp.1137-1140
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    • 2003
  • The area of the prototype device is less than 80mm$^2$. Operating with a 60ns clock cycle, the device typically dissipates only 300mW. The full functionality was proven by using the methodical test programs based on typical image processing operations. Also, we realized the whole process from conventional gray image to color image. Format converters, implemented using multidimensional access memories, transfer the data between the processing element array and conventional bit-parallel components in real time. The completed system is fully functional and performs typical low-level image processing tasks at speed exceeding 30 frames of traditional TV system per second.

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JPH Timer Display System for Indicating the Standard Outputs JPH (표준 작업량 지시용 JPH 타이머 Display 시스템)

  • Lee Seong-Cheol;Pang Du-Yeol;Choi Kwang-Hun
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2006.05a
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    • pp.313-314
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    • 2006
  • Indicating product quantity by real time can be benefit both worker and management. Worker can compare real product quantity with its target and can adjust working speed to match with goal. Therefore, so called JPH equipment developed to indicate target quantity of product. As a main processor PIC16F877 was used and FND display were used to indicate current time, elapsed time, JPH value and target amount of product. Values like JPH and starting time, etc. are can easily be set by $4{\times}4$ numeric keypad and display datum likes target amount of product, current time and elapsed time, etc are displayed on FND by RS232 serial transmit. The operation of JPH equipment are tested and verified through long term test and are proved acting properly on working conditions.

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A Study on the Performance of Flat-plate Solar Air Collector and its Application to Grain Drying (평면식 태양열집열기를 이용한 곡물 건조개선에 관한 연구)

  • 민영봉;최규홍
    • Journal of Biosystems Engineering
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    • v.3 no.2
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    • pp.114-125
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    • 1978
  • The use of petroleum fuels in grain drying causes problems of high cost and management. To solve these problems, it is required to study on soLar energy as an alternative to petroleum fuels for grain drying. The purposes of this study were to find out the optimum received area and air flow rate of a flat-plate solar air collector for grain drying and to assess its effects on grain drying with a small grain bin. The results of this study are summarized as follows ; 1. The calculated optimum tilt angles of the collector in the summer and autumn drying seasons were 20 and 50 degress, respectively, in suwon area. 2. The outlet temperature of the collector was $36^\circ C$ on the daily average with the maximum of $36^\circ C$ at 12:00 o clock. Solar radiation on the collector surface was 1.04 ly( 1 langley = 1 cal/$cm^2$) per minute on the daily average and 1.30 ly per minute on the maximum at 11:00am. The thermal efficiency of the collector was 62.4 percent on the daily average, and the air flow-rate per unit receiving are was 1.03 $m^3$/min/$m^2$.4. The calculated optimum receiving area and the air flow-rate per unit cubic volume for paddy in autumn drying season was 2 $m^2$ and 2$m^3$/min , respectively. 5. not significantly difference in the collector efficiency was appeared between the rotating and fixed type of solar collector. 6. For drying of wheat with 0.6 meter of the depth in the bin, approximately 9 hours were required to reduce the moisture content from 21.6% to 13% with air follow rate of 5 $m^3$/min an initial moisture per cubic meter of wheat and with air temperature of $52^\circ C$. 7. In the drying test of rough rice with a turning operation in a grain bin approximately 21 hours were required to reduced the moisture from 21% to 14.5% with airflow rate of 2 $m^3$/min per cubic meter of rice and the air temperature of $43.5^\circ C$. 8. Over-drying at the bottom and less -drying at the top of the grain mass was resulted from the high -temperature of drying air which was obtained from the flat-plate solar collector in this test. An appropriate operation should be prepared for the uniform moisture of the grain in the bin.

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