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Logic Built-In Self Test Based on Clustered Pattern Generation  

Kang, Yong-Suk (System IC Division, SIC R&D Center, LG Electronics Inc.)
Kim, Hyun-Don (Dept. of Electrical Eng., Yonsei Univ.)
Seo, Il-Suk (SOC Technology TE Group, System LSI Division Samsung Electronics co., LTD.)
Kang, Sung-Ho (Dept. of Electrical Eng., Yonsei Univ.)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.39, no.7, 2002 , pp. 81-88 More about this Journal
Abstract
A new pattern generator of BIST based on the pattern clustering is developed. The proposed technique embeds a pre-computed deterministic test set with low hardware overhead for test-per-clock environments. The test control logic is simple and can be synthesized automatically. Experimental results for the ISCAS benchmark circuits show that the effectiveness of the new pattern generator compared to the previous methods.
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