• Journal of Microbiology and Biotechnology
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• 제18권6호
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• pp.1024-1032
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• 2008

Efficient expression of the Salmonella Typhimurium tdc ABCDEG operon involved in the degradation of L-serine and L-threonine requires TdcA, the transcriptional activator of the tdc operon. We found that the tdcA gene was transiently activated when the bacterial growth condition was changed from aerobic to anaerobic, but this was not observed if Salmonella was grown anaerobically from the beginning of the culture. Expression kinetics of six tdc genes after anaerobic shock demonstrated by a real-time PCR assay showed that the tdc CDEG genes were not induced in the tdcA mutant but tdcB maintained its inducibility by anaerobic shock even in the absence of tdcA, suggesting that an additional unknown transcriptional regulation may be working for the tdcB expression. We also investigated the effects of nucleoid-associated proteins by primer extension analysis and found that H-NS repressed tdcA under anaerobic shock conditions, and fis mutation delayed the peak expression time of the tdc operon. DNA microarray analysis of genes regulated by TdcA revealed that the genes involved in N-acetylmannosamine, maltose, and propanediol utilization were significantly induced in a tdcA mutant. These findings suggest that Tdc enzymes may playa pivotal role in energy metabolism under a sudden change of oxygen tension.

• Journal of Microbiology and Biotechnology
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• 제21권3호
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• pp.252-255
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• 2011

Both Escherichia coli (E. coli) and Salmonella enterica serovar Typhimurium (S. Typhimurium) have a tdc operon that encodes enzymes involved in a metabolic pathway for the degradation of L-serine and L-threonine. However, S. Typhimurium does not have the tdcR gene, which is a positive regulator in E. coli. In the present study, transcriptional analysis revealed that tdcA expression in E. coli is higher under anaerobic than aerobic growth conditions, but the opposite is true in S. Typhimurium. Interestingly, a tdcR mutant strain of E. coli showed a similar expression pattern to that observed in S. Typhimurium and was also induced by anaerobic shock. These results suggest that the induction of tdcA expression by anaerobic conditions is observable when tdcA expression is low owing to the absence of TdcR.

• 전기전자학회논문지
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• 제27권3호
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• pp.234-238
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• 2023

본 논문에서는 PVT(process, voltage, and temperature) 변화에 대한 보상기능을 가지는 시간-디지털 변환기(time-to-digital converter : TDC)를 제안한다. 일반적인 지연 라인(delay line) 기반의 TDC는 인버터의 전파 지연을 기반으로 시간을 측정하기 때문에 근본적으로 PVT 변화에 민감하다. 이 논문은 PVT 변화에 의한 전파 지연을 보상하여 TDC의 해상도 변화를 최소화시키는 방법을 제안한다. 또한 넓은 입력 측정 범위(detection range)를 갖기 위해 Cyclic Vernier TDC (CVTDC) 구조를 채택한다. 제안하는 PVT보상 기능의 CVTDC는 45nm CMOS 공정으로 설계되어, 8mW의 전력을 소모하며, 5 ps의 TDC 해상도 및 약 5.1 ns 입력 측정 범위를 갖는다.

• 전자공학회논문지 IE
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• 제49권1호
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• pp.1-6
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• 2012

본 논문에서는 시간-디지털 변환기의 성능 개선을 위하여, 높은 해상도의 2단 시간-디지털 변환기(TDC)를 설계하였다. TDC 중간에 2단 버니어 시간 증폭기(2-S VTA)를 사용하여 2단 구조를 갖도록 하였다. 2단 버니어 시간 증폭기는 기존의 시간 증폭기에 비해 이득이 64 이상으로 매우 크기 때문에 전체 2단 TDC의 해상도를 높인다. TDC는 버니어 구조를 사용하였기 때문에 고급 공정에 제한받지 않고, 높은 해상도를 얻을 수 있다. 제안하는 2단 TDC는 $0.18{\mu}m$ CMOS 공정으로 설계하였고, 전원 전압은 1.8V로 모의실험 하였다. 전체 입력 범위는 512ps이고 전체 해상도는 0.125ps이다.

• Nuclear Engineering and Technology
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• 제55권2호
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• pp.484-492
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• 2023

Time-to-digital converters (TDCs) based on the tapped delay line (TDL) architecture have been widely used in various applications requiring a precise time measurement. However, the poor uniformity of the propagation delays in the TDL implemented on FPGA leads to bubble error and large nonlinearity of the TDC. The purpose of this study was to develop an advanced TDC architecture capable of minimizing the bubble errors and improving the linearity. To remove the bubble errors, the decimated delay line (DDL) architecture was implemented on the UltraScale + FPGA; meanwhile, to improve the linearity of the TDC, a histogram uniformization (HU) and multi-chain TDL (MCT) methods were developed and implemented on the FPGA. The integral nonlinearities (INLs) and differential nonlinearities (DNLs) of the plain TDCs with the 'HU method' (HU TDC) and with 'both HU and MCT methods' (HU-MCT TDC) were measured and compared to those of the TDC with 'DDL alone' (plain TDC). The linearity of HU-MCT TDC were superior to those of the plain TDC and HU TDC. The experiment results indicated that HU-MCT TDC developed in this study was useful for improving the linearity of the TDC, which allowed for high timing resolution to be achieved.

• 전자공학회논문지
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• 제52권2호
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• pp.195-200
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• 2015

본 논문에서는 ADPLL의 잡음 개선을 위해 8비트 SVBS-TDC (Semi-Vernier Binary-Search Time-to-Digital Converter)를 제안했다. TDC의 동작 속도를 높이기 위해 인코더 등 디지털 블록을 사용하지 않는 BS-TDC (Binary-Search TDC) 구조를 사용했으며, 버니어 구조를 적용하여 기존의 BS-TDC에 비해 해상도를 10배 이상 증가시켰다. TDC의 단점인 좁은 입력범위를 개선하기 위해 버니어 구조를 절반만 적용하여 510ps의 넓은 입력 범위를 확보했다. 제안하는 SVBS-TDC는 65nm CMOS 공정으로 설계하였고, 모의실험 결과 1.2V 전원 전압에서 동작 속도는 200MHz이고 해상도는 4ps로서 ADPLL의 잡음 특성을 효과적으로 개선함을 확인하였다.

• 한국산업융합학회 논문집
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• 제19권3호
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• pp.109-124
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• 2016

The objective of this paper is to find the density, stiffness, and strength of truss-wall diamond corrugation model combined with pinwheel truss inside space. The truss-wall diamond corrugation (TDC) model is defined as a unit cell coming from solid-wall diamond corrugation (SDC) model. Pinwheel truss-wall diamond corrugation (P-TDC) model is made by TDC connected with pinwheel structure inside of the space. Derived ideal solutions of P-TDC is based on truss-wall and pinwheel truss model at first. And then it is compared with Gibson-Ashby's ideal solution. To validate the ideal solutions of the P-TDC, ABAQUS software is used to predict the density, strength, and stiffness, and then each of them are compared to the ideal solution of Gibson-Ashby with a log-log scale. Applied material property is stainless steel 304 because of having cost effectiveness. Applied parameters for P-TDC are 1 thru 5 mm diameter within fixed opening width as 4mm. In conclusion, the relative Young's modulus and relative yield strength of the P-TDC unit model is reasonable matched to the ideal expectations of the Gibson-Ashby's theory. In nearby future, P-TDC model is hoped to be applied to make sandwich core structure by advanced technologies such as 3D printing skills.

• 한국정밀공학회지
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• 제14권6호
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• pp.106-113
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• 1997

A new algorithm based upon TDC (Time Delay Control) is proposed to improve the robustness of TDC performance in systems where the stick-slip friction is strong. Experiments were performed at the different levels of friction. The reponses of the TDC and the modified TDC were compared each other, and against those of a PID controller with an anti-windup. The results show that the TDC and the modified TDC equally perform better than the PID, and that the modified TDC performs consistently well even with variations in the friction level while the TDC does not.

• Molecules and Cells
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• 제28권4호
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• pp.389-395
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• 2009

We previously observed that the transcription of some flagellar genes decreased in Salmonella Typhimurium tdcA mutant, which is a gene encoding the transcriptional activator of the tdc operon. Since flagella-mediated bacterial motility accelerates the invasion of Salmonella, we have examined the effect of tdcA mutation on the invasive ability as well as the flagellar biosynthesis in S. Typhimurium. A tdcA mutation caused defects in motility and formation of flagellin protein, FliC in S. Typhimurium. Invasion assays in the presence of a centrifugal force confirmed that the defect of flagellum synthesis decreases the ability of Salmonella to invade into cultured epithelial cells. In addition, we also found that the expression of Salmonella pathogenicity island 1 (SPI1) genes required for Salmonella invasion was down-regulated in the tdcA mutant because of the decreased expression of fliZ, a positive regulator of SPI1 transcriptional activator, hilA. Finally, the virulence of a S. Typhimurium tdcA mutant was attenuated compared to a wild type when administered orally. This study implies the role of tdcA in the invasion process of S. Typhimurium.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.411-417
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• 2012

A Coarse-Fine Time-to-Digital Converter (TDC) using the single time amplifier is proposed. A vernier delay line is used to overcome process dependency and the 2-stage time amplifier is designed to have high resolution by increasing the gain of the time amplifier. Single time amplifier architecture reduces the silicon area of the TDC and alleviates mismatch effect between time amplifiers. The proposed TDC is implemented in $0.18{\mu}m$ CMOS process with the supply voltage of 1.8 V. The measured results show that the resolution of the TDC is 0.73 ps with 10-bit digital output, although highend process is not applied. The single time amplifier architecture reduces 13% of chip area compared to previous work. By reducing the supply voltage, the linearity of the TDC is enhanced and the resolution is decreased to 1.45 ps.