A study on Improvement of sub 0.1$\mu\textrm{m}$ VLSI CMOS device Ultra Thin Gate Oxide Quality Using Novel STI Structure
(STI를 이용한 서브 0.1$\mu\textrm{m}$ VLSI CMOS 소자에서의 초박막게이트산화막의 박막개선에 관한 연구)
-
- Journal of the Korean Institute of Electrical and Electronic Material Engineers
- /
- v.13 no.9
- /
- pp.729-734
- /
- 2000