• 제목/요약/키워드: stress voltage

검색결과 1,070건 처리시간 0.03초

Linear Ion Source를 이용한 Anode Voltage 변화에 따른 DLC 박막특성 (Effect of Anode Voltage on Diamond-like Carbon Thin Film Using Linear Ion Source)

  • 김왕렬;정우창;조형호;박민석;정원섭
    • 한국표면공학회지
    • /
    • 제42권4호
    • /
    • pp.179-185
    • /
    • 2009
  • Diamond-like carbon(DLC) films were deposited by linear ion source(LIS)-physical vapor deposition method changing the anode voltages from 800 V to 1800 V, and characteristics of the films were investigated using residual stress tester, nano-indentation, micro raman spectroscopy, scratch tester and Field Emission Scanning Electron Microscope(FE-SEM). The results showed that the residual stress and hardness increased with increasing the ion energy up to anode voltage of 1400 V. It was also found that the content of $SP^3$ carbon increased with increasing the anode voltage $SP^3/SP^2$ ratio through investigation of $SP^3/SP^2$ ratio by the micro-raman analysis. From these results, it can be concluded that the physical properties of DLC films such as residual stress and hardness are increased with increasing the anode voltage. These results can be explained that 3-dimensional cross-links between carbon atoms and Dangling bond are enhanced and the internal compressive stress also increased with increasing the anode voltage. The optimal anode voltage is considered to be around 1400 V in these experimental conditions.

Accelerated life test plan under modified ramp-stress loading with two stress factors

  • Srivastava, P.W.;Gupta, T.
    • International Journal of Reliability and Applications
    • /
    • 제18권2호
    • /
    • pp.21-44
    • /
    • 2017
  • Accelerated life tests (ALTs) are frequently used in manufacturing industries to evaluate the reliability of products within a reasonable amount of time and cost. Test units are subjected to elevated stresses which yield quick failures. Most of the previous works on designing ALT plans are focused on tests that involve a single stress. Many times more than one stress factor influence the product's functioning. This paper deals with the design of optimum modified ramp-stress ALT plan for Burr type XII distribution with Type-I censoring under two stress factors, viz., voltage and switching rate each at two levels- low and high. It is assumed that usage time to failure is power law function of switching rate, and voltage increases linearly with time according to modified ramp-stress scheme. The cumulative exposure model is used to incorporate the effect of changing stresses. The optimum plan is devised using D-optimality criterion wherein the ${\log}_{10}$ of the determinant of Fisher information matrix is maximized. The method developed has been explained using a numerical example and sensitivity carried out.

  • PDF

AT 플라이백 다중공진형 컨버터 동작모드 해석 (Operational Mode Analysis of the AT Flyback Multi-Resonant Converter)

  • 박귀철;김창선
    • 전기학회논문지
    • /
    • 제56권7호
    • /
    • pp.1250-1254
    • /
    • 2007
  • The multi-resonant(MR) converter has a characteristics that the parasitic components existing in the converter are absorbed into the resonant circuits. The designed MR converter could be got a high efficiency and a high power density because the switching power losses are reduced effectively due to resonant switching circuit. However, the high resonant voltage stress of switching power devices leads to the conduction loss. In this paper, it is proposed the novel alternated(AT) flyback multi-resonant converter to overcome such a drawback. The suggested converter dc input is divided by two series input filter capacitors. The resonant stress voltage is reduced to 2-3 times the input voltage without any complexity and it provides the various circuit schemes in lots of applications. The proposed flyback MR converter is verified through simulation and experiment.

저전압 스트레스를 갖는 AT 포워드 다중 공진형 컨버터 (AT forward MRC with a low voltage stress)

  • 황치면;김희준;김창선;김영태
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 1998년도 하계학술대회 논문집 F
    • /
    • pp.2042-2044
    • /
    • 1998
  • In this paper, we proposed the alternated forward multi-resonant converter. It can reduce the voltage stress due to the operation of two multi resonant switches and also provides a high frequency applications. The proposed circuit is verified through the PSpice simulation and the 50W experimental set with 2MHz maximum frequency. The measured voltage stress is up to 170V of 2.9 times the input voltage and the efficiency is about 81.66% at low line.

  • PDF

잉크젯 프린팅으로 제작된 유기 박막 트랜지스터의 이력특성 분석 (Hysteresis characteristics of organic thin film transistors using inkjet printing)

  • 구남희;송승현;최길복;송근규;김보성;신성식;정윤하
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 2006년도 하계종합학술대회
    • /
    • pp.557-558
    • /
    • 2006
  • In this paper, the hysteresis characteristics by bias stress in organic thin film transistors using inkjet printing were investigated. Electron trapping increased threshold voltage for positive gate bias stress and hole trapping decreased threshold voltage for negative gate bias stress. From these phenomena, highly reproducible measurement method which minimized threshold voltage shift by choosing the proper range of gate voltage was suggested. Using this measurement method, we found that electron trapping as well as hole trapping had important influence on hysteresis characteristics.

  • PDF

AT 플라이백 다중 공진형 컨버터의 동작특성 (A Characteristic of Alternative Flyback Multi-Resonant Converter)

  • 정진범;김희준;김창선;우승훈;박우철
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2005년도 제36회 하계학술대회 논문집 B
    • /
    • pp.1380-1382
    • /
    • 2005
  • The multi-resonant converter minimizes a parasitic oscillation by using the resonant tank circuit absorbed parasitic reactance existing in a converter circuit. So it is possible that the converter operated at a high frequency has a high efficiency because the losses are reduced. However, the resonant voltage stress across a switch is four or five times a input voltage. This high voltage stress increases the conduction loss. In this paper, we proposed the AT flyback multi-resonant converter. The proposed converter can reduce the voltage stress to two or three times by using two series input capacitors. The operational principle of the proposed converter was verified through the experimental converter.

  • PDF

Low Actuation Voltage Capacitive Shunt RF-MEMS Switch Using a Corrugated Bridge with HRS MEMS Package

  • Song Yo-Tak;Lee Hai-Young;Esashi Masayoshi
    • Journal of electromagnetic engineering and science
    • /
    • 제6권2호
    • /
    • pp.135-145
    • /
    • 2006
  • This paper presents the theory, design, fabrication and characterization of the novel low actuation voltage capacitive shunt RF-MEMS switch using a corrugated membrane with HRS MEMS packaging. Analytical analyses and experimental results have been carried out to derive algebraic expressions for the mechanical actuation mechanics of corrugated membrane for a low residual stress. It is shown that the residual stress of both types of corrugated and flat membranes can be modeled with the help of a mechanics theory. The residual stress in corrugated membranes is calculated using a geometrical model and is confirmed by finite element method(FEM) analysis and experimental results. The corrugated electrostatic actuated bridge is suspended over a concave structure of CPW, with sputtered nickel(Ni) as the structural material for the bridge and gold for CPW line, fabricated on high-resistivity silicon(HRS) substrate. The corrugated switch on concave structure requires lower actuation voltage than the flat switch on planar structure in various thickness bridges. The residual stress is very low by corrugating both ends of the bridge on concave structure. The residual stress of the bridge material and structure is critical to lower the actuation voltage. The Self-alignment HRS MEMS package of the RF-MEMS switch with a $15{\Omega}{\cdot}cm$ lightly-doped Si chip carrier also shows no parasitic leakage resonances and is verified as an effective packaging solution for the low cost and high performance coplanar MMICs.

실리콘 산화막에서 저레벨누설전류 특성 (The Characteristics of LLLC in Ultra Thin Silicon Oxides)

  • 강창수
    • 전자공학회논문지
    • /
    • 제50권8호
    • /
    • pp.285-291
    • /
    • 2013
  • 본 논문은 금속 산화물 반도체의 산화막 두께, 채널 폭과 길이에 따른 실리콘 산화막의 신뢰성 특성을 연구하였다. 스트레스전류와 전이전류는 스트레스 전압에 의하여 발생된다. 스트레스 유기 누설전류는 스트레스 전압 인가 동안과 인가 후의 실리콘 산화막에 나타난다. 이때 저레벨 스트레스 전압에 의한 저레벨 누설전류는 저전압 인가 동안과 인가 후의 얇은 실리콘 산화막에서 발생한다. 저레벨 누설전류는 각각 스트레스 바이어스 조건에 따라 스트레스전류와 전이전류를 측정하였다. 스트레스 채널전류는 일정한 게이트 전압이 인가동안 측정하였고 전이 채널전류는 일정한 게이트 전압을 인가한 후에 측정하였다. 본 연구는 소자의 구동 동작 신뢰성을 위하여 저레벨 스트레스 바이어스 전압에 의한 스트레스 전류와 전이전류가 발생되어 이러한 저레벨 누설전류를 조사하였다.

Characteristics of Barkhausen Noise Properties and Hysteresis Loop on Tensile Stressed Rolled Steels

  • Kikuchi, Hiroaki;Ara, Katsuyuki;Kamada, Yasuhiro;Kobayashi, Satoru
    • Journal of Magnetics
    • /
    • 제16권4호
    • /
    • pp.427-430
    • /
    • 2011
  • The rolled steels for welded structure applied tensile stress have been examined by means of magnetic Barkhausen noise (MBN) method and of a physical parameter obtained from a hysteresis loop. The behaviors of MBN parameters and coercive force with tensile stress were discussed in relation to microstructure changes. There is no change in MBN parameters and coercive force below yield strength. The coercive force rises rapidly with tensile stress above yield strength. On the other hand, the rms voltage and the peak in averaged rms voltage take a maximum around yield strength and then decreases. The magnetomotive force at peak in the averaged rms voltage shows a minimum around yield strength. These phenomena are attributed to the combined effects of cell texture and dislocation density. In addition, the behaviors of MBN parameters around yield strength may be reflected by the localized changes in strain field due to the formation of dislocation tangles.

액정 소자의 열적 안전성에 관한 연구 (Study for Thermal Stability of Liquid Crystal Device)

  • 이상극;황정연;서대식;이준웅
    • 한국전기전자재료학회논문지
    • /
    • 제17권4호
    • /
    • pp.439-442
    • /
    • 2004
  • In this study, we investigated about electrooptics characteristic of three kinds of TN cell on the polyimide surface. Monodomain alignments of thermal stressed TN cell over temperature of liquid crystal isotropic phase were almost the same as that of no thermal stressed TN cells. However, the thermal stressed TN cells have many defects. Also, threshold voltage and response time of thermal stressed TN cells show the same performances as no thermal stressed TN cells. There were little changes of value in these TN cells. However, transmittances of TN cells on the polyimide surface decrease with increasing thermal stress time. Finally, the residual DC voltage of the thermal stressed TN cell on the polyimide surface shows decrease of characteristics as increasing thermal stress time. Therefore, the thermal stability of TN cell was decreased by high thermal stress for the long times.