• Journal of Information Display
• /
• v.1 no.1
• /
• pp.63-69
• /
• 2000

In order to improve both the level and the stability of electron emission, Mo and Co silicides were formed from Mo mono-layer and Ti/Co bi-layers on single crystal silicon field emitter arrays (FEAs), respectively. Using the slope of Fowler-Nordheim curve and tip radius measured from scanning electron microscopy (SEM), the effective work function of Mo and Co silicide FEAs were calculated to be 3.13 eV and 2.56 eV, respectively. Compared with silicon field emitters, Mo and Co silicide exhibited 10 and 34 times higher maximum emission current, 10 V and 46 V higher device failure voltage, and 6.1 and 4.8 times lower current fluctuation, respectively. Moreover, the emission currents of the silicide FEAs depending on vacuum level were almost the same in the range of $10^{-9}{\sim}10^{-6}$ torr. This result shows that silicide is robust in terms of anode current degradation due to the absorption of air molecules.

• Journal of the Korean Electrochemical Society
• /
• v.7 no.4
• /
• pp.173-178
• /
• 2004

Silicon thin film were synthesized from silane and argon gas mixture directly on copper foil by rf PECVD and then lithium ion batteries were prepared from them employed as the negative electrodes without any further treatment. In the present study, two different kinds of silicon thin films, amorphous silicon and copper silicide were prepared by changing deposition temperature. Amorphous silicon film was prepared below $200^{\circ}C$, but copper silicide film with granular shape was formed by the reaction between silicon radical and diffused copper ions under elevating temperature above $400^{\circ}C$. The amorphous silicon film gives higher capacity than copper silicide, but the capacity decreases sharply with charge-discharge cycling. This is possibly due to severe volume changes. The cyclability is improved, however, by employing the copper silicide as a negative electrode. The copper silicide plays an important role as an active material of the electrode, which mitigates volume change cause by the existence of silicon and copper chemical bonding and provides low electrical resistance as well.

• Korean Journal of Metals and Materials
• /
• v.46 no.2
• /
• pp.69-79
• /
• 2008

A composition consisting of 10 nm-Ni/1 nm-Pd/(30 nm or 70 nm-poly)Si was thermally annealed using rapid thermal for 40 seconds at $300{\sim}1100^{\circ}C$ to improve the thermal stability of conventional nickel monosilicide. The annealed bilayer structure developed into $Ni(Pd)Si_x$, and the resulting changes in sheet resistance, microstructure, phase, chemical composition, and surface roughness were investigated. The silicide, which formed on single crystal silicon, could defer the transformation of $NiSi_2$, and was stable at temperatures up to $1100^{\circ}C$. It remained unchanged on polysilicon substrate compared with the sheet resistance of conventional nickel silicide. The silicides annealed at $700^{\circ}C$, formed on single crystal silicon and 30 nm polysilicon substrates exhibited 30 nm-thick uniform silicide layers. However, silicide annealed at $1,000^{\circ}C$ showed preferred and agglomerated phase. The high resistance was due to the agglomerated and mixed microstructures. Through X-ray diffraction analysis, the silicide formed on single crystal silicon and 30 nm polysilicon substrate, showed NiSi phase on the entire temperature range and mixed phases of NiSi and $NiSi_2$ on 70 nm polysilicon substrate. Through scanning probe microscope (SPM) analysis, we confirmed that the surface roughness increased abruptly until 36 nm on 30 nm polysilicon substrate while not changed on single crystal and 70 nm polysilicon substrates. The Pd-inserted nickel monosilicide could maintain low resistance in a wide temperature range and is considered suitable for nano-thick silicide processing.

• Journal of Korea Foundry Society
• /
• v.17 no.1
• /
• pp.85-92
• /
• 1997

There has been a considerable interest to develop the silicide alloys as high temperature structural materials because of their excellent high temperature stability and strength, however, their lack of room temperature ductility and toughness was a main obstacle for the application. In order to improve ductility while maintaining good high temperature properties, possible refractory metal-silicide eutectic alloys composed of fine two phases were prepared by VAR(Vacuum Arc Remelting). Three silicide alloys, $Nb-Nb_3Si$, $Ti-Ti_5Si_3$, $V-V_3Si$, were selected as prospecting silicide eutectics and those high temperature characteristics were evaluated by high temperature compression test.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2002.08a
• /
• pp.685-688
• /
• 2002

In this paper, it is reported that the anode current changes at the constantly applied gate voltages and the current-voltage (I-V) characteristics of Si, Co silicide and Mo silicide field emitter arrays (FEAs) depending on vacuum level from a $10^{-9}$ torr to a $10^{-6}$ torr. The mechanism of the robustness of anode current degradation of Mo silicide FEAs under poor vacuum conditions can be explained by the model of tolerance for the oxygen adsorption and oxidation at the silicide surface. Also, we present the changes of emitting area and work function of the emitters according to vacuum level.

• Proceedings of the KIEE Conference
• /
• 1988.07a
• /
• pp.387-390
• /
• 1988

The increases in the packing density and the resulting shrinkage of silicon integrated circuit dimensions led to the investigation and successful of the deposited silicide layers as the gate and interconnection and contact metallization. In this paper evaporated Co films on n-Si have been rapid thermal annealed in $N_2$ambient at temperature of $400^{\circ}C-1000^{\circ}C$. The Co silicide formation is characterized by sheet resistance (4PP). Also, silicide growth rate and its reproductivity has been examined by SEM.

• Journal of the Semiconductor & Display Technology
• /
• v.7 no.2
• /
• pp.1-5
• /
• 2008

Silicide formation process and the formation sequence were investigated in this study. It was postulated that the formation of the second silicide phase involves glass formation between the first silicide phase and Si given that a thin metal film is deposited on a Si substrate. The concentration of glass was assumed to be located where the free energy of the liquid alloy with respect to the first nucleated compound and solid Si (${\Delta}$G') is most negative. It was also mentioned that the glass concentration is close to the composition of the second phase in order to achieve the maximum energy degradation. It was shown that the minimum ${\Delta}$G' concentration can be estimated by interpolating the portion of the liquidus where the liquid alloy is in equilibrium with the two solid constituents, namely the first compound phase and Si, thereby forming a hypothetical eutectic.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.22 no.6
• /
• pp.457-461
• /
• 2009

In this paper, barrier height between Ni-silicide and source/drain is reduced utilizing Pd stacked structure (Pd/Ni/TiN) for high performance PMOSFET. It is shown that the barrier height is decreased by Pd incorporation and is dependent on the Pd thickness. Therefore, Ni-silicide using the Pd stacked structure is promising for high performance nano-cale PMOSFET.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.48 no.7
• /
• pp.521-524
• /
• 1999

Nb silicide was formed on the Si micro-tip arrays in order to improve field emission properties of Si-tip field emitter array. After silicidization of the tips, the etch-back process, by which gate insulator, gate electrode and photoresist were deposited sequentially and gate holes were defined by removing gradually the photoresist by $O_2$ plasma from the surface, was applied. Si nitride film was used as a protective layer in order to prevent oxygen from diffusion into Nb silicide layer and it was identified that the NbSi2 was formed through annealing in $N_2$ ambient at $1100^{\circ}C$ for 1 hour. By the Nb silicide coating on Si tips, the turn-on voltage was decreased from 52.1 V to 32.3 V and average current fluctuation for 1 hour was also reduced from 5% to 2%. Also, the fabricated Nb silicide-coated Si tip FEA emitted electrons toward the phosphor and light emission was obtained at the gate voltage of 40~50 V.

• Journal of the Korean institute of surface engineering
• /
• v.38 no.1
• /
• pp.44-48
• /
• 2005

We prepared nickel silicide layers from p-Si(l00)/SiO₂(2000 Å)/poly-Si(700 Å)/Ni(400 Å) structures, feasible for gates in MOSFETs, by annealing them from 500℃～900℃ for 30 minutes. We measured the color coordination in visible range, cross sectional micro-structure, and surface topology with annealing temperature by an UV-VIS-IR spectrometer, field effect scanning electron microscope(FE-SEM), and scanning probe micro-scope respectively. We conclude that we may identify the nickel silicide by color difference of 0.90 and predict the silicide process reliability by color coordination measurement. The nickel silicide layers showed similar thickness while the columnar grains size and surface roughness increased as annealing temperature increased.