• Title/Summary/Keyword: signal synthesis

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Specification and Synthesis of Speed-independent Circuit using VHDL (VHDL을 이용한 속도 독립 회로의 기술과 합성)

  • Jeong, Seong-Tae
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.7
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    • pp.1919-1928
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    • 1999
  • There are no standard language for the specification of speed-independent circuits because existing specification methods are designed appropriately to each synthesis methodology. This paper suggests a method of using VHDL, a standard hardware description language, for the specification and synthesis of speed-independent circuits. Because VHDL is a multi-purpose language, we define a subset of VHDL which can be used for the synthesis. We transform the VHDL description into a signal transition graph and then synthesize speed-independent circuits by using a previous synthesis algorithm which uses a signal transition graph as the specification method. We suggest a systematic transformation method which transforms each VHDL statement into a partial signal transition graph and then merges them into a signal transition graph. This work is a step towards to the development of an integrated framework in which we can utilizes the existing CAD tools based on VHDL. Also, this work will enable a easier migration of the current circuit designers into asynchronous circuit design.

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Improved Phase Synthesis for Parametric Stereo Audio Coding (파라메트릭 스테레오 오디오 부호화를 위한 향상된 위상 합성 기법)

  • Hyun, Dong-Il;Park, Young-Cheol;Youn, Dae Hee
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.12
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    • pp.184-190
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    • 2013
  • Parametric stereo(PS) audio coding is a specific version of spatial audio coding. In this paper, the problem due to the conventional synthesis of phase differences. In the conventional upmix matrix, phase differences are synthesized not only on downmix signal but also ambient signal, which violates the assumption that the ambient signals are anti-phased. Deterioration due to the phase synthesis is analyzed, especially, for low interchannel correlation. To solve this problem, new upmix matrix is proposed, which synthesizes phase differences only on downmix signal. The performance of the proposed upmix matrix is verified by the subjective listening tests.

Design and Implementation of Korean Tet-to-Speech System (다이폰을 이용한 한국어 문자-음성 변환 시스템의 설계 및 구현)

  • 정준구
    • Proceedings of the Acoustical Society of Korea Conference
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    • 1994.06c
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    • pp.91-94
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    • 1994
  • This paper is a study on the design and implementation of the Korean Tet-to-Speech system. In this paper, parameter symthesis method is chosen for speech symthesis method and PARCOR coeffient, one of the LPC analysis, is used as acoustic parameter, We use a diphone as synthesis unit, it include a basic naturalness of human speech. Diphone DB is consisted of 1228 PCM files. LPC synthesis method has defect that decline clearness of synthesis speech, during synthesizing unvoiced sound In this paper, we improve clearness of synthesized speech, using residual signal as ecitation signal of unvoiced sound. Besides, to improve a naturalness, we control the prosody of synthesized speech through controlling the energy and pitch pattern. Synthesis system is implemented at PC/486 and use a 70Hz-4.5KHz band pass filter for speech imput/output, amplifier and TMS320c30 DSP board.

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An Efficient Resource-constrained Scheduling Algorithm (효율적 자원제한 스케줄링 알고리즘)

  • 송호정;정회균;황인재;송기용
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2001.06a
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    • pp.73-76
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    • 2001
  • High-level synthesis generates a structural design that implements the given behavior and satisfies design constraints for area, performance, power consumption, packaging, testing and other criteria. Thus, high-level synthesis generates that register-transfer(RT) level structure from algorithm level description. High-level synthesis consist of compiling, partitioning, scheduling. In this paper, we proposed the efficient scheduling algorithm that find the number of the functional unit and scheduling into the minimum control step with silicon area resource constrained.

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A Study on the Characteristics of Delay Parameter Change in Approximately Reconstruction IIR/FIR QMF Filter Banks (근사 복원 IIR/FIR QMF 필터뱅크에서 지연요소 변화에 따른 특성에 관한 연구)

  • 이상준;김남수;김남호
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2003.06a
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    • pp.296-299
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    • 2003
  • This paper shows a novel and simple IIR/FIR QMF(quadrature mirror filter) filter banks, mixed IIR and FIR structure. Here, FIR filters used for phase compensation. In this paper, we introduced analysis and synthesis filter banks, which used FIR linear phase filters and all pass filters. In result, phase response of analysis and synthesis filter banks become approximately linear characteristic. Simultaneously, a liasing distortion can be completely canceled.

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Speech Signal Compression and Recovery Using Transition Detection and Approximate-Synthesis (천이구간 추출 및 근사합성에 의한 음성신호 압축과 복원)

  • Lee, Kwang-Seok;Lee, Byeong-Ro
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.2
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    • pp.413-418
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    • 2009
  • In a speech coding system using excitation source of voiced and unvoiced, it would be involved a distortion of speech qualify in case coexist with a voiced and an unvoiced consonants in a frame. So, We proposed TS(Transition Segment) including unvoiced consonant searching and extraction method in order to uncoexistent with a voiced and unvoiced consonants in a frame. This research present a new method of TS approximate-synthesis by using Least Mean Square and frequency band division. As a result, this method obtain a high qualify approximation-synthesis waveforms within TS by using frequency information of 0.547kHz below and 2.813kHz above. The important thing is that the maximum error signal can be made with low distortion approximation-synthesis waveform within TS. This method has the capability of being applied to a new speech coding of Voiced/Silence/TS, speech analysis and speech synthesis.

A Study on the Pitch Detection of Speech Harmonics by the Peak-Fitting (음성 하모닉스 스펙트럼의 피크-피팅을 이용한 피치검출에 관한 연구)

  • Kim, Jong-Kuk;Jo, Wang-Rae;Bae, Myung-Jin
    • Speech Sciences
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    • v.10 no.2
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    • pp.85-95
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    • 2003
  • In speech signal processing, it is very important to detect the pitch exactly in speech recognition, synthesis and analysis. If we exactly pitch detect in speech signal, in the analysis, we can use the pitch to obtain properly the vocal tract parameter. It can be used to easily change or to maintain the naturalness and intelligibility of quality in speech synthesis and to eliminate the personality for speaker-independence in speech recognition. In this paper, we proposed a new pitch detection algorithm. First, positive center clipping is process by using the incline of speech in order to emphasize pitch period with a glottal component of removed vocal tract characteristic in time domain. And rough formant envelope is computed through peak-fitting spectrum of original speech signal infrequence domain. Using the roughed formant envelope, obtain the smoothed formant envelope through calculate the linear interpolation. As well get the flattened harmonics waveform with the algebra difference between spectrum of original speech signal and smoothed formant envelope. Inverse fast fourier transform (IFFT) compute this flattened harmonics. After all, we obtain Residual signal which is removed vocal tract element. The performance was compared with LPC and Cepstrum, ACF. Owing to this algorithm, we have obtained the pitch information improved the accuracy of pitch detection and gross error rate is reduced in voice speech region and in transition region of changing the phoneme.

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Digital-Radio Conversion System using Vector Synthesis Method (벡터합성방법에 의한 디지털-무선 변환시스템)

  • Joo Chang Bok;Kim Sung Ho
    • Journal of the Institute of Convergence Signal Processing
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    • v.1 no.2
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    • pp.131-137
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    • 2000
  • In this paper, as a compatible software radio transmission system, Digital-Radio conversion system which can directly change the digital signal generated by the logic circuit into radio signal is proposed. By the vector synthesis method, the digital signals can change directly into radio signal. If such a circuit is realized, RF circuit and an antenna can be composed by the simple one device, and the radio is directly controlled and performed by the software processing which is the essence of software radio. This Digital-Radio conversion system of this paper give many number of communication channels being offered by PN code and offer a hardware design flexibility by digitization, therefore it decrease the percentage ratio of hardware of system and give a more flexible function of software basis. In this paper, the principle of digital to radio signal generation algorithm is explained and the performance characteristics of proposed algorithm is shown in time base by the computer simulation method.

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Translating concurrent programs into petri nets for synthesis of asynchronous circuits (비동기회로 합성을 위한 병행 프로그램의 페트리 넷으로의 변환)

  • 유동훈;이동익
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.883-886
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    • 1998
  • We introduce a high level synthesis methodlogoy for automatic synthesis of asynchronous circuits form a language based on CSP. The input language is a high level concurrent algorithmic specification that can model complex concurrent control flow, logical and arithmetic computation and communications between them. This specification is translated into petri net which has actions. These actions are refined to synthesize the controllers and to allocate the data resources. We use the automatic synthesis through signal transition graphs (STGs) that allows to take advantage of logic synthsis methods to optimize the circuit.

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A New SoC Platform with an Application-Specific PLD (전용 PLD를 가진 새로운 SoC 플랫폼)

  • Lee, Jae-Jin;Song, Gi-Yong
    • Journal of the Institute of Convergence Signal Processing
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    • v.8 no.4
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    • pp.285-292
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    • 2007
  • SoC which deploys software modules as well as hardware IPs on a single chip is a major revolution taking place in the implementation of a system design, and high-level synthesis is an important process of SoC design methodology. Recently, SPARK parallelizing high-level synthesis software tool has been developed. It takes a behavioral ANSI-C code as an input, schedules it using code motion and various code transformations, and then finally generates synthesizable RTL VHDL code. Although SPARK employs various loop transformation algorithms, the synthesis results generated by SPARK are not acceptable for basic signal and image processing algorithms with nested loop. In this paper we propose a SoC platform with an application-specific PLD targeting local operations which are feature of many loop algorithms used in signal and image processing, and demonstrate design process which maps behavioral specification with nested loops written in a high-level language (ANSI-C) onto 2D systolic array. Finally the derived systolic array is implemented on the proposed application-specific PLD of SoC platform.

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