• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.3
• /
• pp.18-27
• /
• 2010

In this paper, a 1.2V 7-bit 1GSPS A/D converter with offset self-calibration is proposed. The proposed A/D converter structure is based on the folding-interpolation whose folding rate is 2, interpolation rate is 8. Further, for the purpose of improving the chip performance, an offset self-calibration circuit is used. The offset self-calibration circuit reduce the variation of the offset-voltage，due to process mismatch, parasitic resistor, and parasitic capacitance. The chip has been fabricated with a 1.2V 65nm 1-poly 6-metal CMOS technology. The effective chip area is $0.87mm^2$ and the power dissipates about 110mW at 1.2V power supply. The measured SNDR is about 39.1dB when the input frequency is 250MHz at 800MHz sampling frequency. The measured SNDR is 3dB higher than the same circuit without any calibration.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.48 no.4
• /
• pp.14-23
• /
• 2011

In this paper, a 7-bit 2GSPS folding/interpolation A/D Converter(ADC) with a Self-Calibrated Vector Generator is proposed. The ADC structure is based on a folding/interpolation architecture whose folding/interpolation rate is 4 and 8, respectively. A cascaded preprocessing block is not only used in order to drive the high input signal frequency, but the resistive interpolation is also used to reduce the power consumption. Based on a novel self-calibrated vector generator, further, offset errors due to device mismatch, parasitic resistors. and parasitic capacitance can be reduced. The chip has been fabricated with a 1.2V 0.13um 1-poly 7-metal CMOS technology. The effective chip area including the calibration circuit is 2.5$mm^2$. SNDR is about 39.49dB when the input frequency is 9MHz at 2GHz sampling frequency. The SNDR is improved by 3dB with the calibration circuit.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.13 no.5
• /
• pp.473-481
• /
• 2013

A fractional folding analog-to-digital converter (ADC) with a novel arithmetic digital encoding technique is discussed. In order to reduce the asymmetry errors of the boundary conditions for the conventional folding ADC, a structure using an odd number of folding blocks and fractional folding rate is proposed. To implement the fractional technique, a new arithmetic digital encoding technique composed of a memory and an adder is described. Further, the coding errors generated by device mismatching and other external factors are minimized, since an iterating offset self-calibration technique is adopted with a digital error correction logic. A prototype 8-bit 1GS/s ADC has been fabricated using an 1.2V 0.13 um 1-poly 6-metal CMOS process. The effective chip area is $2.1mm^2$(ADC core : $1.4mm^2$, calibration engine : $0.7mm^2$), and the power consumption is 88 mW. The measured SNDR is 46.22 dB at the conversion rate of 1 GS/s. Both values of INL and DNL are within 1 LSB.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.50 no.1
• /
• pp.137-147
• /
• 2013

In this paper, an 1.2V 8b 1GS/s A/D Converter(ADC) based on a folding architecture with a resistive interpolation technique is described. In order to overcome the asymmetrical boundary-condition error of conventional folding ADCs, a novel scheme with an odd number of folding blocks and a fractional folding rate are proposed. Further, a new digital encoding technique with an arithmetic adder is described to implement the proposed fractional folding technique. The proposed ADC employs an iterating offset self-calibration technique and a digital error correction circuit to minimize device mismatch and external noise The chip has been fabricated with a 1.2V 0.13um 1-poly 6-metal CMOS technology. The effective chip area is $2.1mm^2$ (ADC core : $1.4mm^2$, calibration engine : $0.7mm^2$) and the power dissipation is about 350mW including calibration engine at 1.2V power supply. The measured result of SNDR is 46.22dB, when Fin = 10MHz at Fs = 1GHz. Both the INL and DNL are within 1LSB with the self-calibration circuit.

• Journal of the Society of Cosmetic Scientists of Korea
• /
• v.44 no.4
• /
• pp.399-405
• /
• 2018

The multi-layered and compartmented hydrogel was designed to examine the self-transforming for developing a 4D mask pack. The hydrogel consisting of two layers with different expansion ratios were fabricated to have specific curvature by self-folding assembly. In addition, the hydrogel compartmented with three different geometries was designed by varying of expansion ratios. The compartmented hydrogel with 0.03, 0. $0,03mm^{-1}$ of curvatures at room temperature was self-transformed with 1.33, 0, $1.33mm^{-1}$of curvatures at $37^{\circ}C$, enhancing the facial adhesion. Overall, this new strategy to prepare the multi-layered and compartmented hydrogel would be actively used in developing the 4D mask pack to self-transform by each facial curvature.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.12 no.1
• /
• pp.1-9
• /
• 2012

A 10-b 500 MS/s A/D converter (ADC) with a hybrid calibration and error correction logic is described. The ADC employs a single-channel cascaded folding-interpolating architecture whose folding rate (FR) is 25 and interpolation rate (IR) is 8. To overcome the disadvantage of an offset error, we propose a hybrid self-calibration circuit at the open-loop amplifier. Further, a novel prevision digital error correction logic (DCL) for the folding ADC is also proposed. The ADC prototype using a 130 nm 1P6M CMOS has a DNL of ${\pm}0.8$ LSB and an INL of ${\pm}1.0$ LSB. The measured SNDR is 52.34-dB and SFDR is 62.04-dBc when the input frequency is 78.15 MHz at 500 MS/s conversion rate. The SNDR of the ADC is 7-dB higher than the same circuit without the proposed calibration. The effective chip area is $1.55mm^2$, and the power dissipates 300 mW including peripheral circuits, at a 1.2/1.5 V power supply.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.02a
• /
• pp.38-38
• /
• 2010

Ever since the experimental discovery of graphene exfoiliated from the graphite flakes by Geim et at., this area has drawn a lot of attention for its possible application in IT industry. For the growth of graphene, chemical vapor deposition (CVD) has been widely used to fabricate the large area graphene. The lateral size of this graphene can be easily controlled by the size of the metal substrate though the chemical etching to remove this substrate is somewhat troublesome. Another problem which is hard to avoid is the folding at the grain boundary. We will discuss the origin of the folding first and introduce the way to avoid this folding. To solve this problem, we have used the various types of micro-thin metal foils. The precise control of hydro-carbon and the carrier gas results in the formation of the graphene on top of substrate. The thickness of graphene layers can be controlled with the control of gas flow on top of Cu substrate in contrast to the previously reported self-limiting growth $behavior^1$. Uniformity of this graphene layer has been checked by micro-raman spectroscopy and SEM. The size of grain can be enhanced by thermal treatment or use of other metal substrate. The dependence of grain size on the lattice size of the substrate will be discussed. By selecting the shape of substrate, we can grow various types of graphene. We will introduce the micron size graphene tube and its application.

• Journal of Korean Neurosurgical Society
• /
• v.64 no.3
• /
• pp.367-373
• /
• 2021

Secondary neurulation (SN) is a critical process to form the neural tube in the posterior region of the body including the tail. SN is distinct from the anteriorly occurring primary neurulation (PN); whereas the PN proceeds by folding an epithelial neural plate, SN precursors arise from a specified epiblast by epithelial-to-mesenchymal transition (EMT), and undergo self-renewal in the tail bud. They finally differentiate into the neural tube through mesenchymal-to-epithelial transition (MET). We here overview recent progresses in the studies of SN with a particular focus on the regulation of cell lineage, self-renewal, and EMT/MET. Cellular mechanisms underlying SN help to understand the functional diversity of the tail in vertebrates.

• Journal of Korean Academy of Rural Health Nursing
• /
• v.2 no.2
• /
• pp.120-126
• /
• 2007

Purpose: The objective of this study was to evaluate the effects of leisure programs over 8 weeks on elderly women 60 and over who lived in a rural area. Did the program affect feelings of depression and self-esteem? Method: The leisure programs in this study included rhythm gymnastics for elderly women, recreation, balloon art, paper folding, viewing movies, shuttle cock game, exhibition and evaluation activity. As a Quasi-Experimental study, the design of this study was a Nonequivalent Control Group Pretest-Posttest Design. Results: It was shown that leisure programs for elderly women for 8 weeks, consisting of rhythm gymnastics, self-introduction, hobby activities and recreation can reduce depression and enhance the feeling of self-esteem in elderly women in the rural area. Conclusion: It is concluded that public health centers in rural areas should conduct leisure programs during the farmers' slack season, and that the community halls for elders can contribute to improving the life quality of elderly women by being more affirmative and positive if they develop as healthy and active cultural centers where elderly women will want to come and participate.

• Korean Institute of Interior Design Journal
• /
• v.16 no.2 s.61
• /
• pp.163-171
• /
• 2007

The present study approached the characteristics of various space compositions in contemporary residential architecture through the concept of ex-formality, and found that ex-formal spaces are composed through the variation of floor, wall, ceiling or roof and derived four types of ex-formal space composition - ex-cubic space composition using folding, plastic space composition using the plasticity of concrete, atypical space composition using geometric manipulation, and non linear space composition using digital technology. Based on this, additionally, we derived elements expressing the characteristics of ex-formal space composition, which are obliqueness, inclination, flexibility in ex-cubic space composition using folding, plasticity and fluidity in plastic space composition using the plasticity of concrete, ex-construction, dynamism and asymmetry in atypical space composition using geometric manipulation, and flexibility, fluidity, self similarity and plasticity in non linear space composition using digital technology. On the other hand, this study purposed to help understand various space expression patterns of contemporary residential architecture by analyzing how these types of ex-formal space composition and polysemous expression characteristics have been represented in contemporary residential architecture since the 1990s.