• Journal of information and communication convergence engineering
• /
• v.17 no.2
• /
• pp.161-165
• /
• 2019

In this study, zinc tin oxide (ZTO) thin-film transistors are researched to observe the correlation between the barrier potential and electrical properties. Although much research has been conducted on the electronic radiation from Schottky contacts in semiconductor devices, research on electronic radiation that occurs at voltages above the threshold voltage is lacking. Furthermore, the current phenomena occurring below the threshold voltage need to be studied. Bidirectional transistors exhibit current flows below the threshold voltage, and studying the characteristics of these currents can help understand the problems associated with leakage current. A factor that affects the stability of bidirectional transistors is the potential barrier to the Schottky contact. It has been confirmed that Schottky contacts increase the efficiency of the element in semiconductor devices, by cutting off the leakage current, and that the recombination at the PN junction is closely related to the Schottky contacts. The bidirectional characteristics of the transistors are controlled by the space-charge limiting currents generated by the barrier potentials of the SiOC insulated film. Space-charge limiting currents caused by the tunneling phenomenon or quantum effect are new conduction mechanisms in semiconductors, and are different from the leakage current.

• Transactions on Electrical and Electronic Materials
• /
• v.15 no.6
• /
• pp.324-327
• /
• 2014

Germanium (Ge) is a promising material for next generation nanoelectronics and multiple junction solar cells. This work investigated the electrical properties in Cu/p-type Ge Schottky diodes, using current-voltage (I-V) measurements. The Schottky barrier heights were 0.66, 0.59, and 0.70 eV from the forward ln(I)-V, Cheung, and Norde methods, respectively. The ideality factors were 1.92 and 1.78 from the forward ln(I)-V method and Cheung method, respectively. Such high ideality factor could be associated with the presence of an interfacial layer and interface states at the Cu/p-Ge interface. The reverse-biased current transport was dominated by the Poole-Frenkel emission rather than the Schottky emission.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.10
• /
• pp.25-34
• /
• 2002

In this paper, silicidation induced Schottky contact area was obtained using the current voltage(I-V) characteristics of shallow cobalt silicided p+-n and n+-p junctions. In reverse bias region, Poole-Frenkel barrier lowering influenced predominantly the reverse leakage current, masking thereby the effect of Schottky contact formation. However, Schottky contact was conclusively shown to be the root cause of the modified I-V behavior of n+-p junction in the forward bias region. The increase of leakage current in silicided n+-p diodes is consistent with the formation of Schottky contact via cobalt slicide penetrating into the p-substrate or near to the junction area and generating trap sites. The increase of reverse leakage current is proven to be attributed to the penetration of silicide into depletion region in case of the perimeter intensive n+-p junction. In case of the area intensive n+-p junction, the silicide penetrated near to the depletion region. There is no formation of Schottky contact in case of the p+-n junction where no increase in the leakage current is monitored. The Schottky contact amounting to less than 0.01% of the total junction was extracted by simultaneous characterization of forward and reverse characteristics of silicided n+-p diode.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.2
• /
• pp.221-225
• /
• 2016

This paper reports a new method to enable the normally-off operation of AlGaN/GaN heterojunction field-effect transistors (HFETs). A capacitor was connected to the gate input node of a normally-on AlGaN/GaN HFET with a Schottky gate where the Schottky gate acted as a clamping diode. The combination of the capacitor and Schottky gate functioned as a clamp circuit to downshift the input signal to enable the normally-off operation. The normally-off operation with a virtual threshold voltage of 5.3 V was successfully demonstrated with excellent dynamic switching characteristics.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.348-348
• /
• 2010

Nanostructures have great potential in various devices due to the their promising electronic and optical properties. Nano-patterned the front surface of a solar cell generally results in improved performance, mostly due to an increase in the short-circuit current by the incident photons strike the cell surface at an angle. In this work, we investigate AFM-assisted nano-patterned field effect transistors (FETs) with vairous silicon oxide distance value D, from ${\sim}0.5{\mu}m$ to $1{\mu}m$. Also, we compared the electro-optical characteristics of the patterned FETs and the non-patterned FETs (reference device) based on both 2-dimensional simulation and experimental results for the wavelength from 100nm to 900nm. In addition, we report electric characteristics for illuminated surface in schottky barrier field effect transistors (SB-FETs).

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.10 no.2
• /
• pp.152-159
• /
• 2010

We propose a semi-analytical current conduction model for depletion-mode n-type nanowire field-effect transistors (NWFETs) with top-gate structure. The NWFET model is based on an equivalent circuit consisting of two back-to-back Schottky diodes for the metal-semiconductor (MS) contacts and the intrinsic top-gate NWFET. The intrinsic top-gate NWFET model is derived from the current conduction mechanisms due to bulk charges through the center neutral region as well as of accumulation charges through the surface accumulation region, based on the electrostatic method, and thus it includes all current conduction mechanisms of the NWFET operating at various top-gate bias conditions. Our previously developed Schottky diode model is used for the MS contacts. The newly developed model is integrated into ADS, in which the intrinsic part of the NWFET is developed by utilizing the Symbolically Defined Device (SDD) for an equation-based nonlinear model. The results simulated from the newly developed NWFET model reproduce considerably well the reported experimental results.

• Korean Journal of Materials Research
• /
• v.32 no.8
• /
• pp.333-338
• /
• 2022

In this work, we developed silver nanowires and a silicon based Schottky junction and demonstrated ultrafast broadband photosensing behavior. The current device had a response speed that was ultrafast, with a rising time of 36 ㎲ and a falling time of 382 ㎲, and it had a high level of repeatability across a broad spectrum of wavelengths (λ = 365 to 940 nm). Furthermore, it exhibited excellent responsivity of 60 mA/W and a significant detectivity of 3.5 × 10¹² Jones at a λ = 940 nm with an intensity of 0.2 mW cm^-2 under zero bias operating voltage, which reflects a boost of 50 %, by using the AC PV effect. This excellent broadband performance was caused by the photon-induced alternative photocurrent effect, which changed the way the optoelectronics work. This innovative approach will open a second door to the potential design of a broadband ultrafast device for use in cutting-edge optoelectronics.

• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2010.05a
• /
• pp.179-180
• /
• 2010

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2005.11a
• /
• pp.104-104
• /
• 2005

• Transactions on Electrical and Electronic Materials
• /
• v.16 no.4
• /
• pp.187-189
• /
• 2015

A charge-trap flash (CTF) thin film transistor (TFT) memory is proposed at a low-temperature process (≤ 450℃). The memory cell consists of a sputtered oxide-nitride-oxide (ONO) gate dielectric and Schottky barrier (SB) source/drain (S/D) junctions using nickel silicide. These components enable the ultra-low-temperature process to be successfully achieved with the ONO gate stacks that have a substrate temperature of room temperature and S/D junctions that have an annealing temperature of 200℃. The silicidation process was optimized by measuring the electrical characteristics of the Ni-silicided Schottky diodes. As a result, the Ion/Ioff current ratio is about 1.4×10⁵ and the subthreshold swing and field effect mobility are 0.42 V/dec and 14 cm²/V·s at a drain voltage of −1 V, respectively.