[KSCI] Korea Science Citation Index Service

http://dx.doi.org/10.4313/TEEM.2015.16.4.187

Low-Temperature Poly-Si TFT Charge Trap Flash Memory with Sputtered ONO and Schottky Junctions

An, Ho-Myoung (Department of Electronics, Osan University)
Kim, Jooyeon (School of Electrical Electronics Engineering, Ulsan College)

Publication Information

Transactions on Electrical and Electronic Materials / v.16, no.4, 2015 , pp. 187-189 More about this Journal

Abstract

A charge-trap flash (CTF) thin film transistor (TFT) memory is proposed at a low-temperature process (≤ 450℃). The memory cell consists of a sputtered oxide-nitride-oxide (ONO) gate dielectric and Schottky barrier (SB) source/drain (S/D) junctions using nickel silicide. These components enable the ultra-low-temperature process to be successfully achieved with the ONO gate stacks that have a substrate temperature of room temperature and S/D junctions that have an annealing temperature of 200℃. The silicidation process was optimized by measuring the electrical characteristics of the Ni-silicided Schottky diodes. As a result, the Ion/Ioff current ratio is about 1.4×10⁵ and the subthreshold swing and field effect mobility are 0.42 V/dec and 14 cm²/V·s at a drain voltage of −1 V, respectively.

Keywords

Low-temperature polycrystalline silicon (LTPS); Charge-trap flash (CTF); Thin film transistor (TFT); Schottky barrier (SB) junction; Ni-silicide;

Citations & Related Records

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