• Title/Summary/Keyword: resistive feedback

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CMOS Analog Integrate-and-fire Neuron Circuit for Driving Memristor based on RRAM

  • Kwon, Min-Woo;Baek, Myung-Hyun;Park, Jungjin;Kim, Hyungjin;Hwang, Sungmin;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.2
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    • pp.174-179
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    • 2017
  • We designed the CMOS analog integrate and fire (I&F) neuron circuit for driving memristor based on resistive-switching random access memory (RRAM). And we fabricated the RRAM device that have $HfO_2$ switching layer using atomic layer deposition (ALD). The RRAM device has gradual set and reset characteristics. By spice modeling of the synaptic device, we performed circuit simulation of synaptic device and CMOS neuron circuit. The neuron circuit consists of a current mirror for spatial integration, a capacitor for temporal integration, two inverters for pulse generation, a refractory part, and finally a feedback part for learning of the RRAM. We emulated the spike-timing-dependent-plasticity (STDP) characteristic that is performed automatically by pre-synaptic pulse and feedback signal of the neuron circuit. By STDP characteristics, the synaptic weight, conductance of the RRAM, is changed without additional control circuit.

Analog active valve control design for non-linear semi-active resetable devices

  • Rodgers, Geoffrey W.;Chase, J. Geoffrey;Corman, Sylvain
    • Smart Structures and Systems
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    • v.19 no.5
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    • pp.487-497
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    • 2017
  • Semi-active devices use the building's own motion to produce resistive forces and are thus strictly dissipative and require little power. Devices that independently control the binary open/closed valve state can enable novel device hysteresis loops that were not previously possible. However, some device hysteresis loops cannot be obtained without active analog valve control allowing slower, controlled release of stored energy, and is presents an ongoing limitation in obtaining the full range of possibilities offered by these devices. This in silico study develops a proportional-derivative feedback control law using a validated nonlinear device model to track an ideal diamond-shaped force-displacement response profile using active analog valve control. It is validated by comparison to the ideal shape for both sinusoidal and random seismic input motions. Structural application specific spectral analysis compares the performance for the non-linear, actively controlled case to those obtained with an ideal, linear model to validate that the potential performance will be retained when considering realistic nonlinear behaviour and the designed valve control approach. Results show tracking of the device force-displacement loop to within 3-5% of the desired ideal curve. Valve delay, rather than control law design, is the primary limiting factor, and analysis indicates a ratio of valve delay to structural period must be 1/10 or smaller to ensure adequate tracking, relating valve performance to structural period and overall device performance under control. Overall, the results show that active analog feedback control of energy release in these devices can significantly increase the range of resetable, valve-controlled semi-active device performance and hysteresis loops, in turn increasing their performance envelop and application space.

A 800MHz~5.8GHz Wideband CMOS Low-Noise Amplifier (800MHz~5.8GHz 광대역 CMOS 저잡음 증폭기 설계)

  • Kim, Hye-Won;Tak, Ji-Young;Lee, Jin-Ju;Shin, Ji-Hye;Park, Sung-Min
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.45-51
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    • 2011
  • This paper presents a wideband low-noise amplifier (LNA) covering 800MHz~5.8GHz for various wireless communication standards by utilizing in a 0.13um CMOS technology. Particularly, the LNA consists of two stages to improve the low-noise characteristics, that is, a cascode input stage and an output buffer with noise cancellation technique. Also, a feedback resistor is exploited to help achieve wideband impedance matching and wide bandwidth. Measure results demonstrate the bandwidth of 811MHz~5.8GHz, the maximum gain of 11.7dB within the bandwidth, the noise figure of 2.58~5.11dB. The chip occupies the area of $0.7{\times}0.9mm^2$, including pads. DC measurements reveal the power consumption of 12mW from a single 1.2V supply.

Multi-channel analyzer based on a novel pulse fitting analysis method

  • Wang, Qingshan;Zhang, Xiongjie;Meng, Xiangting;Wang, Bao;Wang, Dongyang;Zhou, Pengfei;Wang, Renbo;Tang, Bin
    • Nuclear Engineering and Technology
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    • v.54 no.6
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    • pp.2023-2030
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    • 2022
  • A novel pulse fitting analysis (PFA) method is presented for the acquisition of nuclear spectra. The charging process of the feedback capacitor in the resistive feedback charge-sensitive preamplifier is equivalent to the impulsive pulse, and its impulse response function (IRF) can be obtained by non-linear fitting of the falling edge of the nuclear pulse. The integral of the IRF excluding the baseline represents the energy deposition of the particles in the detector. In addition, since the non-linear fitting process in PFA method is difficult to achieve in the conventional architecture of spectroscopy system, a new multi-channel analyzer (MCA) based on Zynq SoC is proposed, which transmits all the data of nuclear pulses from the programmable logic (PL) to the processing system (PS) by high-speed AXI-Stream in order to implement PFA method with precision. The linearity of new MCA has been tested. The spectrum of 137Cs was obtained using LaBr3(Ce) scintillator detector, and was compared with commercial MCA by ORTEC. The results of tests indicate that the MCA based on PFA method has the same performance as the commercial MCA based on pulse height analysis (PHA) method and excellent linearity for γ-rays with different energies, which infers that PFA method is an effective and promising method for the acquisition of spectra. Furthermore, it provides a new solution for nuclear pulse processing algorithms involving regression and iterative processes.

KLYSTRON-MODULATOR SYSTEM PERFORMANCES FOR PLS 2-GeV LINAC (포항 20억 전자볼트 선형가속기 클라이스트론-모듈레이터 시스템의 성능)

  • Park, S.W.;Park, S.S.;Lee, K.T.;Oh, J.S.;Cho, M.H.;NamKung, W.
    • Proceedings of the KIEE Conference
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    • 1995.07c
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    • pp.1365-1367
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    • 1995
  • The PLS 2-GeV linac employs 11 units of high-power pulsed klystrons(80MW) as the main RF sources. The matching modulators of 200 MW(400kV, 500 A) can provide a flat-top pulse width of 4.4 ${\mu}s$ with a maximum pulse repetition rate of 120 Hz at the full power level. For a good stability of electron beams, the pulse-to-pulse flat-top voltage variation of a modulator requires less than 0.5%. In order to achieve this goal, we stabilized high voltage charging power supplies within 1% by a phase controlled SCR voltage regulator. In addition, we employed ac/dc feedback together with a resistive De-Q'ing system to achieve far less than 0.5% variation of the PFN charging voltage. This paper presents the main feature of the klystron-modulator system and the characteristics of the pulsed high-power RF system performance during the beam injection operation for the Pohang Light Source commissioning.

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Active Shape Control of Composite Beam Using Shape Memory Alloy Actuators (형상기억합금 작동기를 이용한 복합재 보의 능동 형상 제어)

  • Yang, Seung-Man;Roh, Jin-Ho;Han, Jae-Hung;Lee, In
    • Composites Research
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    • v.17 no.4
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    • pp.18-24
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    • 2004
  • In this paper, active shape control of composite structures actuated by shape memory alloy (SMA) wires is presented. The thermo-mechanical behaviors of SMA wires were experimentally measured. Hybrid composite structures were established by attaching SMA actuators on the surfaces of graphite/epoxy composite beams using bolt-joint connectors. SMA actuators were activated by phase transformation, which induced by temperature rising over austenite finish temperature. In this paper, electrical resistive heating was applied to the hybrid composite structures to activate the SMA actuators. For (aster and more accurate shape/deflection control of the hybrid composite structure, PID feedback controller was designed from numerical simulations and experimentally applied to the SMA actuators.

A Study on the Per-Channel CPCM Method by means of the 1-Bit Interpolation (1-Bit Interpolation을 이용한 Per-Channel CPCM부호화방식에 관한 연구)

  • 정해원;조성준
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.7 no.2
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    • pp.47-54
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    • 1982
  • In this paper, a improved per-channel PCM Coder with 1-bit interpolation is proposed. The coder converts a telephone signal to 15-segments u-law PCM signal of a large dynamic range. The A/D conversion technique of the proposed converter requires a feedback loop around a quantizer operates at high speed, and a accumulater for accumulating the quantized values to provide PCM outputs. To obtain both linear and compressed PCM signals a improved table look-up method is presented. The operations of the proposed converter are certified through the experiments to be good. The experimental circuit comprises TTL logic gates, a resistive D/Z converter and a simple differential amplifier. From the results of the experiments, it is known that the proposed converter has many advantage to be adopted economically for per-channel onverter used in rural area service.

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AlGaN/GaN Based Ultra-wideband 15-W High-Power Amplifier with Improved Return Loss

  • Jeong, Jin-Cheol;Jang, Dong-Pil;Shin, Dong-Hwan;Yom, In-Bok;Kim, Jae-Duk;Lee, Wang-Youg;Lee, Chang-Hoon
    • ETRI Journal
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    • v.38 no.5
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    • pp.972-980
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    • 2016
  • An ultra-wideband microwave monolithic integrated circuit high-power amplifier with excellent input and output return losses for phased array jammer applications was designed and fabricated using commercial $0.25-{\mu}m$ AlGaN/GaN technology. To improve the wideband performance, resistive matching and a shunt feedback circuit are employed. The input and output return losses were improved through a balanced design using Lange-couplers. This three-stage amplifier can achieve an average saturated output power of 15 W, and power added efficiency of 10% to 28%, in a continuous wave operation over a frequency range of 6 GHz to 18 GHz. The input and output return losses were demonstrated to be lower than -15 dB over a wide frequency range.

A 1V 10b 30MS/s CMOS ADC Using a Switched-RC Technique (스위치-RC 기법을 이용한 1V 10비트 30MS/s CMOS ADC)

  • Ahn, Gil-Cho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.61-70
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    • 2009
  • A 10b 30MS/s pipelined ADC operating under 1V power supply is presented. It utilizes a switched-RC based input sampling circuit and a resistive loop to reset the feedback capacitor in the multiplying digital-to-analog converter (MDAC) for the low-voltage operation. Cascaded switched-RC branches are used to achieve accurate grain of the MDAC for the first stage and separate switched-RC circuits are used in the sub-ADC to suppress the switching noise coupling to the MDAC input The measured differential and integral non-linearities of the prototype ADC fabricated in a 0.13${\mu}m$, CMOS process are less than 0.54LSB and 1.75LSB, respectively. The prototype ADC achieves 54.1dB SNDR and 70.4dB SFDR with 1V supply and 30MHz sampling frequency while consuming 17mW power.

Development of Distribution Superconducting Fault Current Limiter and its Monitoring System for Power IT Application (배전급 초전도한류기 및 전력 IT 응용을 위한 실시간 모니터링 시스템 개발)

  • Park, Dong-Keun;Seok, Bok-Yeol;Ko, Tae-Kuk;Kang, Hyoung-Ku
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.3
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    • pp.398-402
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    • 2008
  • Recently, the development of superconducting fault current limiters (SFCLs) has been required as power demands increase in the power system. A distribution-level prototype resistive SFCL using coated conductor (CC) has been developed by Hyundai Heavy Industries Co., Ltd. and Yonsei University for the first time in the world. The ratings of the SFCL are 13.2kV/630A at normal operating condition. A novel non-inductive winding method is used in fabricating coils so there is almost zero impedance during normal operation. The distribution SFCL is cooled by sub-cooled liquid nitrogen $(LN_2)$ of 65K and 3 bar to enhance cryo-dielectric performance, critical current density, and thermal conductivity. In order to make reliable operation of an SFCL in real power systems, we monitored and controled its operation conditions by using supervisory control and data acquisition (SCADA) method. Thus, a monitoring system for the SFCL employing information technology (IT) is proposed and developed to be on the lookout for the operation conditions such as inside temperature, inside pressure, $LN_2$ level, voltage and current. Since operation temperature should be kept constant, bang-bang control for temperature feedback with a heater attached to the cold head of cryo-cooler is applied to the system. Short-circuit tests with prospective fault current of 10kA and AC dielectric withstand voltage tests up to 143kV for 1 minute were successfully performed at Korea Electrotechnology Research Institute. This paper deals with the development of a distribution level SFCL and its monitoring system for reliable operation.