• 로봇학회논문지
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• 제17권2호
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• pp.230-237
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• 2022

A technology that allows users to feel the elasticity of fabric through force feedback in the fashion and textile fields is very helpful to related manufacturing and sales areas. Currently bundle of fabrics, so called Swatch, is the only available way for the designer, manufacturer and the end-user to feel the fabrics. Images and video clips provide only visual characteristics, hence touch and stiffness are also very important characteristics to check beforehand. A study is conducted on a haptic device, which estimates the amount of change in the length of the virtual fabric and generates resistive force so that the user could feel the fabric stiffness. Since cables that can only transmit the tensile force are used, a force realization method is proposed, and it is verified numerically and experimentally.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.174-179
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• 2017

We designed the CMOS analog integrate and fire (I&F) neuron circuit for driving memristor based on resistive-switching random access memory (RRAM). And we fabricated the RRAM device that have $HfO_2$ switching layer using atomic layer deposition (ALD). The RRAM device has gradual set and reset characteristics. By spice modeling of the synaptic device, we performed circuit simulation of synaptic device and CMOS neuron circuit. The neuron circuit consists of a current mirror for spatial integration, a capacitor for temporal integration, two inverters for pulse generation, a refractory part, and finally a feedback part for learning of the RRAM. We emulated the spike-timing-dependent-plasticity (STDP) characteristic that is performed automatically by pre-synaptic pulse and feedback signal of the neuron circuit. By STDP characteristics, the synaptic weight, conductance of the RRAM, is changed without additional control circuit.

• Smart Structures and Systems
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• 제19권5호
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• pp.487-497
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• 2017

Semi-active devices use the building's own motion to produce resistive forces and are thus strictly dissipative and require little power. Devices that independently control the binary open/closed valve state can enable novel device hysteresis loops that were not previously possible. However, some device hysteresis loops cannot be obtained without active analog valve control allowing slower, controlled release of stored energy, and is presents an ongoing limitation in obtaining the full range of possibilities offered by these devices. This in silico study develops a proportional-derivative feedback control law using a validated nonlinear device model to track an ideal diamond-shaped force-displacement response profile using active analog valve control. It is validated by comparison to the ideal shape for both sinusoidal and random seismic input motions. Structural application specific spectral analysis compares the performance for the non-linear, actively controlled case to those obtained with an ideal, linear model to validate that the potential performance will be retained when considering realistic nonlinear behaviour and the designed valve control approach. Results show tracking of the device force-displacement loop to within 3-5% of the desired ideal curve. Valve delay, rather than control law design, is the primary limiting factor, and analysis indicates a ratio of valve delay to structural period must be 1/10 or smaller to ensure adequate tracking, relating valve performance to structural period and overall device performance under control. Overall, the results show that active analog feedback control of energy release in these devices can significantly increase the range of resetable, valve-controlled semi-active device performance and hysteresis loops, in turn increasing their performance envelop and application space.

• 대한전자공학회논문지SD
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• 제48권12호
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• pp.45-51
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• 2011

본 논문에서는 $0.13{\mu}m$ CMOS 공정을 사용하여 800MHz~5.8GHz 대역 내 다양한 무선통신 표준을 포함하는 광대역 저잡음 증폭기(wideband-LNA)를 구현하였다. 저잡음 특성을 개선하기 위하여 제작한 LNA는 두 단으로 구성되었으며, 입력캐스코드 단 및 잡음신호만을 상쇄시키는 출력 버퍼단으로 구성하였다. 또한, 피드백 저항을 이용함으로써, 광대역 임피던스 매칭 효과 및 넓은 대역폭을 구현하였다. 측정결과, 811MHz~5.8GHz의 주파수 응답과 대역폭 내에서 최대 11.7dB의 전력이득 및 2.58~5.11dB의 잡음지수(NF)를 얻었다. 제작한 칩은 $0.7{\times}0.9mm^2$의 면적을 가지며 1.2V의 전원전압에서 12mW의 낮은 전력을 소모 한다.

• Nuclear Engineering and Technology
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• 제54권6호
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• pp.2023-2030
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• 2022

A novel pulse fitting analysis (PFA) method is presented for the acquisition of nuclear spectra. The charging process of the feedback capacitor in the resistive feedback charge-sensitive preamplifier is equivalent to the impulsive pulse, and its impulse response function (IRF) can be obtained by non-linear fitting of the falling edge of the nuclear pulse. The integral of the IRF excluding the baseline represents the energy deposition of the particles in the detector. In addition, since the non-linear fitting process in PFA method is difficult to achieve in the conventional architecture of spectroscopy system, a new multi-channel analyzer (MCA) based on Zynq SoC is proposed, which transmits all the data of nuclear pulses from the programmable logic (PL) to the processing system (PS) by high-speed AXI-Stream in order to implement PFA method with precision. The linearity of new MCA has been tested. The spectrum of ¹³⁷Cs was obtained using LaBr₃(Ce) scintillator detector, and was compared with commercial MCA by ORTEC. The results of tests indicate that the MCA based on PFA method has the same performance as the commercial MCA based on pulse height analysis (PHA) method and excellent linearity for γ-rays with different energies, which infers that PFA method is an effective and promising method for the acquisition of spectra. Furthermore, it provides a new solution for nuclear pulse processing algorithms involving regression and iterative processes.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 C
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• pp.1365-1367
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• 1995

The PLS 2-GeV linac employs 11 units of high-power pulsed klystrons(80MW) as the main RF sources. The matching modulators of 200 MW(400kV, 500 A) can provide a flat-top pulse width of 4.4 ${\mu}s$ with a maximum pulse repetition rate of 120 Hz at the full power level. For a good stability of electron beams, the pulse-to-pulse flat-top voltage variation of a modulator requires less than 0.5%. In order to achieve this goal, we stabilized high voltage charging power supplies within 1% by a phase controlled SCR voltage regulator. In addition, we employed ac/dc feedback together with a resistive De-Q'ing system to achieve far less than 0.5% variation of the PFN charging voltage. This paper presents the main feature of the klystron-modulator system and the characteristics of the pulsed high-power RF system performance during the beam injection operation for the Pohang Light Source commissioning.

• Composites Research
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• 제17권4호
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• pp.18-24
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• 2004

본 논문에서는 복합재 구조물에 대하여 형상기억합금 선을 이용한 능동 형상 제어에 관한 연구를 수행하였다. 형상기억합금 선의 열-기계적인 특성을 실험적으로 측정하였으며, 복합재 보 시편의 표면에 볼트를 이용하여 형상기억합금 작동기를 고정하는 방법으로 하이브리드 복합재 구조물을 제작하였다 형상기억합금 작동기는 온도 상승에 의한 상변화에 의해 작동되며, 본 연구에서는 형상기억합금 작동기에 전력을 가하여 내부 저항을 통해 발생하는 열을 이용하여 구동하였다. 보다 빠르고 정확한 형상 및 변형 제어를 위하여 수치적 시뮬레이션을 통한 PID 되먹임 제어기를 설계하였으며, 형상기억합금 작동기에 적용하는 실험을 수행하였다.

• 한국통신학회논문지
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• 제7권2호
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• pp.47-54
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• 1982

본 논문에서는 A/D, D/A 변환의 한 방식인 1-bit interpolation 방법을 개선, 보완한 1-bit interpolation per-channel u-law companding PCM변환방법을 제시하고 실험회로를 구성하여 이의 동작을 확인하였다. 실험회로는 시중에서 입수하기 수월한 소자들인 TTl, logic IC 및 741 OP Amp 등으로 구성하였다. 실험결과로서는 40dB에 걸친 입력 dynamic range와 40dB 이상의 출력 dynamic range를 얻을 수 있었다. 본 논문에서 제시한 per-channel A/D, D/A변환기는 현용의 공통 codec의 단점을 충분히 보완시킬 수 있을 뿐 아니라 다중화에 있어서도 상당한 잇점을 지니고 있다.

• ETRI Journal
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• 제38권5호
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• pp.972-980
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• 2016

An ultra-wideband microwave monolithic integrated circuit high-power amplifier with excellent input and output return losses for phased array jammer applications was designed and fabricated using commercial $0.25-{\mu}m$ AlGaN/GaN technology. To improve the wideband performance, resistive matching and a shunt feedback circuit are employed. The input and output return losses were improved through a balanced design using Lange-couplers. This three-stage amplifier can achieve an average saturated output power of 15 W, and power added efficiency of 10% to 28%, in a continuous wave operation over a frequency range of 6 GHz to 18 GHz. The input and output return losses were demonstrated to be lower than -15 dB over a wide frequency range.

• 대한전자공학회논문지SD
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• 제46권8호
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• pp.61-70
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• 2009

본 논문에서는 1V 이하의 낮은 전원 전압에서 동작 가능한 10비트 30MS/s 파이프라인 ADC를 제안한다. 제안된 multiplying digital-to-analog converter (MDAC)의 저전압 동작을 위해 스위치-RC 기반의 입력 신호 샘플링 회로와 저항 루프를 이용한 피드백 커패시터 리셋 기법을 제안하였다. 첫 단 MDAC의 정확한 신호 이득을 위해 cascaded 스위치-RC 회로를 사용하였으며, sub-ADC의 비교기에도 독립적인 스위치 RC 샘플링 회로를 적용하여 MDAC 입력단으로 전달되는 스위칭 잡음을 최소화 하였다. 제안된 ADC는 0.13${\mu}m$ CMOS 공정으로 제작되었으며, 측정된 최대 DNL 및 INL은 각각 0.54LSB 및 1.75LSB 수준을 보인다. 또한 1V의 전원 전압과 30MS/s의 동작 속도에서 최대 SNDR 및 SFDR이 각각 54.1dB 70.4dB이고, 17mW의 전력을 소모하였다.