• Journal of Power Electronics
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• 제14권3호
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• pp.444-457
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• 2014

This paper presents the design and realization of a digital PV simulator with a Push-Pull Forward (PPF) circuit based on the principle of modular hardware and configurable software. A PPF circuit is chosen as the main circuit to restrain the magnetic biasing of the core for a DC-DC converter and to reduce the spike of the turn-off voltage across every switch. Control and I/O interface based on a personal computer (PC) and multifunction data acquisition card, can conveniently achieve the data acquisition and configuration of the control algorithm and interface due to the abundant software resources of computers. In addition, the control program developed in Matlab/Simulink can conveniently construct and adjust both the models and parameters. It can also run in real-time under the external mode of Simulink by loading the modules of the Real-Time Windows Target. The mathematic models of the Push-Pull Forward circuit and the digital PV simulator are established in this paper by the state-space averaging method. The pole-zero cancellation technique is employed and then its controller parameters are systematically designed based on the performance analysis of the root loci of the closed current loop with $k_i$ and $R_L$ as variables. A fuzzy PI controller based on the Takagi-Sugeno fuzzy model is applied to regulate the controller parameters self-adaptively according to the change of $R_L$ and the operating point of the PV simulator to match the controller parameters with $R_L$. The stationary and dynamic performances of the PV simulator are tested by experiments, and the experimental results show that the PV simulator has the merits of a wide effective working range, high steady-state accuracy and good dynamic performances.

• 한국통신학회:학술대회논문집
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• 한국통신학회 2004년도 하계종합학술발표회논문초록집
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• pp.432-432
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• 2004

• 한국인터넷방송통신학회논문지
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• 제11권6호
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• pp.295-302
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• 2011

본 논문에서는 단일 주파수 망(Single Frequency Network:SFN)을 통해 ATSC(Advanced Television Systems Committee) 지상파 디지털 TV 방송을 서비스하기 위한 필요한 기술적인 사항에 대해서 고찰하고, ETRI에서 제안한 등화형 동일 채널 중계기(Equalization Digital On Channel Repeater: EDOCR)가 가지는 단점을 극복한 간섭 제거 디지털 동일 재생중계기(Interference Cancellation Digital On Channel Regenerative Repeater: IC-DOCR)을 제안한다. 제안한 IC-DOCR은 EDOCR의 장점인 전송로에 의해 야기된 잡음 및 다중경로 신호를 제거하므로 우수한 송신품질을 유지한다. 또한, EDOCR 단점인 낮은 송수신 안테나의 격리도(isolation)를 확보하기 위해서 수신 신호의 8-VSB 복조를 이용한 간섭제거 알고리즘을 사용하여 송신 출력의 제한을 극복할 수 있다. 전산 실험을 통해서 제안된 시스템의 성능을 분석하고 확인하였다.

• 한국정보통신학회논문지
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• 제24권2호
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• pp.290-296
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• 2020

본 논문에서는 이동성이 전이중 라디오의 성능에 미치는 영향을 분석한다. 이를 위해 배터리로 전원 공급이 가능하여 이동환경에서 동작이 가능한 소프트웨어 정의 라디오를 사용하여 전이중 라디오 원형을 구현하였다. 또한 다중 안테나 기반 전이중 라디오와 서큘레이터기반 전이중 라디오를 모두 고려하여 두 경우의 간섭 제거 성능을 비교하였다. 끝으로 이동성이 전이중 라디오 시스템의 자기간섭제거 성능에 부정적인 영향을 미침을 보이고, 자기간섭제거 필터의 갱신주기가 성능에 미치는 영향을 분석한다. 특히 갱신주기를 약 1000배 줄였을 때, 자기 간섭의 전력이 서큘레이터 기반 전이중 라디오는 5.7dB 두 안테나 기반 전이중 라디오는 3.1dB 감소하는 결과를 얻었다.

• International journal of advanced smart convergence
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• 제9권3호
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• pp.49-58
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• 2020

Non-orthogonal multiple access (NOMA) has been recognized as a significant technology in the fifth generation (5G) and beyond mobile communication, which encompasses the advanced smart convergence of the artificial intelligence (AI) and the internet of things (IoT). In NOMA, since the channel resources are shared by many users, it is essential to establish the user fairness. Such fairness is achieved by the power allocation among the users, and in turn, the less power is allocated to the stronger channel users. Especially, the first and second strong channel users have to share the extremely small amount of power. In this paper, we consider the power optimization for the two users with the small power. First, the closed-form expression for the power allocation is derived and then the results are validated by the numerical results. Furthermore, with the derived analytical expression, for the various channel environments, the optimal power allocation is investigated and the impact of the channel gain difference on the power allocation is analyzed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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• pp.530-532
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• 2005

Actually, it's very difficult to discriminate the transient on underground power cable system because of the reflected signal including many noises. Therefore, in this paper, a solution based on multiple scales correlation of the transient using SWT(Stationary Wavelet Transform) is presented. It's quick and straightforward. For applying all algorithms, we just use the signal captured in single end.

• Journal of electromagnetic engineering and science
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• 제10권2호
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• pp.73-77
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• 2010

This paper proposes a novel memory effect measurement technique in RF power amplifiers(PAs) using a two-tone intermodulation distortion(IMD) signal with a very simple and intuitive algorithm. Based on the proposed predistortive tone cancellation technique, the proposed measurement method is capable of measuring the relative phase and magnitude of the third-order and fifth-order IMDs, as well as the fundamental signal. The measured relative phase between the higher and lower IMD signal for specific tone spacing can be interpreted as the group delay(GD) information of the IMD signal concerned. From the group delay analysis, we can conclude that an adaptive control of GD as well as the magnitude and phase is a key function in increasing the linearization bandwidth and the dynamic range in a predistortion(PD) technique.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 추계학술대회
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• pp.96-97
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• 2019

Pulse Width Modulation (PWM) is a widely adopted technique to drive the motor using the voltage source inverters. Since they generate high frequency Common Mode (CM) Voltage, a high shaft voltage in induction motor is induced which leads to parasitic capacitive currents causing adverse effects such as premature deterioration of ball bearings and high levels of electromagnetic emissions. This paper presents an Active Cancellation Circuit (ACC) which can significantly reduce the CM voltage hence the common mode current in the three phase induction motor drives. In the proposed method the CM voltage is detected by the capacitors and applied to the frame of the motor to cancel the CM voltage hence the CM current. Unlike the conventional methods the proposed method does not insert the transformer in between the inverter and motor, a high power rating three phase transformer is not required and no losses associated with it. In addition the proposed method is applicable to any kind of PWM motor drives regardless of their PWM methods. The effectiveness of the proposed method is proved by the experiments with a three phase induction motor (1.1kW 415V/60Hz) combined with a three phase voltage source inverter modulated by the Space Vector Modulation (SVM).

• 전력전자학회논문지
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• 제25권3호
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• pp.195-203
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• 2020

This paper presents a parasitic inductance reduction design method for the stable driving of GaN HEMT. To reduce the parasitic inductance, we propose a vertical lattice loop structure with multiple loops that is not affected by the GaN HEMT package. The proposed vertical lattice loop structure selects the reference loop and designs the same loop as the reference loop by layering. The design reverses the current direction of adjacent current paths, increasing magnetic flux cancellation to reduce parasitic inductance. In this study, we validate the effectiveness of the parasitic inductance reduction method of the proposed vertical lattice loop structure.

• Journal of Power Electronics
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• 제15권4호
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• pp.1085-1092
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• 2015

In this paper, the expressions of the estimated information of a single-phase enhanced phase-locked loop (EPLL), when input signal contains harmonics and a DC offset while the fundamental component takes step changes, are derived. The theoretical analysis results indicate that in the estimated information, the n^th-order harmonics cause n+1^th-order periodic ripples, and the DC offset causes a periodic ripple at the fundamental frequency. Step changes of the amplitude, phase angle and frequency of the fundamental component cause a transient periodic ripple at twice the frequency. These periodic ripples deteriorate the performance of the EPLL. A hybrid filter based EPLL (HF-EPLL) is proposed to eliminate these periodic ripples. A delay signal cancellation filter is set at the input of the EPLL to cancel the DC offset and even-order harmonics. A sliding Goertzel transform-based filter is introduced into the amplitude estimation loop and frequency estimation loop to eliminate the periodic ripples caused by the residual input odd-order harmonics and step change of the input fundamental component. The parameter design rules of the two filters are discussed in detail. Experimental waveforms of both the conventional EPLL and the proposed HF-EPLL are given and compared with each other to verify the theoretical analysis and advantages of the proposed HF-EPLL.