• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.332-333
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• 2008

DC magnetron sputtering was used to deposit p-type polycrystalline silicon on n-type Si(100) wafer. The influence of film microstructure properties on deposition parameters (DC power, substrate temperature, pressure) was investigated. The substrate temperature and pressure have the important influence on depositing the poly-Si thin films. Smooth ploy-Si films were obtained in (331) orientation and the average grain sizes are ranged in 25-30nm. The grain sizes of films deposited at low pressure of 10mTorr are a little larger than those deposited at high pressure of 15mTorr.

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.4
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• pp.181-184
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• 2004

Thin films of single phase, polycrystalline silicon germanium (Si$_{1-x}$ Ge$_{x}$) were prepared by ion-beam evaporation (IBE) using Si-Ge multi-phase targets. After irradiation of the targets by a pulsed light ion beam with peak energy of 1 MV, 450 and 480 nm thick films were deposited on Si single crystal and quartz glass substrates, respectively. From XRD analysis, the thin films consisted of a single phase Si$_{1-x}$ Ge$_{x}$, whose composition is close to those of the targets.rgets.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.315-318
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• 2004

We developed a vapor induced crystallization (VIC) process for the first time to obtain high quality polycrystalline Si films by sublimating the mixture of $AlCl_3$ and $NiCl_2$. The VIC process enhanced the crystallization of amorphous silicon thin films. The LPCVD amorphous silicon thin films were completely crystallized after 5 hours at 480 $^{\circ}C$. It is known that needle-like grains with very small width grow in the Ni-metal induced lateral crystallization. In our new method, the width of grains is larger because the grain can also grow perpendicular to the needle growth direction. Also the interface between the merging grain boundaries was coherent. As the results, a polycrystalline film with superior microstructure has been obtained.

• Journal of the Korean Physical Society
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• v.73 no.9
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• pp.1329-1333
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• 2018

We investigated the mechanism of mobility enhancement after the dehydrogenation process in polycrystalline silicon (poly-Si) thin films. The dehydrogenation process was performed by using an in-situ CVD chamber in a $N_2$ ambient or an ex-situ furnace in air ambient. We observed that the dehydrogenated poly-Si in a $N_2$ ambient had a lower oxygen concentration than the dehydrogenated poly-Si annealed in an air ambient. The in-situ dehydrogenation increased the (111) preferred orientation of poly-Si and reduced the oxygen concentration in poly-Si thin films, leading to a reduction of the trap density near the valence band. This phenomenon gave rise to an increase of the field-effect mobility of the poly-Si thin film transistor.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.129-134
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• 2004

The development of fabrication processes of polycrystalline-silicon-thin-film transistors (poly-Si TFTs) at low temperatures is reviewed. Rapid crystallization through laser-induced melt-regrowth has an advantage of formation of crystalline silicon films at a low thermal budget. Solid phase crystallization techniques have also been improved for low temperature processing. Passivation of $SiO_2$/Si interface and grain boundaries is important to achieve high carrier transport properties. Oxygen plasma and $H_2O$ vapor heat treatments are proposed for effective reduction of the density of defect states. TFTs with high performance is reported.

• 한국신재생에너지학회:학술대회논문집
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• 2005.11a
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• pp.561-566
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• 2005

Polycrystalline silicon films were deposited using hot wire CVD (HWCVD). The deposition of silicon thin films was approached by the theory of charged clusters (TCC). The TCC states that thin films grow by self-assembly of charged clusters or nanoparticles that have nucleated in the gas phase during the normal thin film process. Negatively charged clusters of a few nanometer in size were captured on a transmission electron microscopy (TEM) grid and observed by TEM. The negatively charged clusters are believed to have been generated by ion-induced nucleation on negative ions, which are produced by negative surface ionization on a tungsten hot wire. The electric current on the substrate carried by the negatively charged clusters during deposition was measured to be approximately $-2{\mu}A/cm^2$. Silicon thin films were deposited at different $SiH_4$ and $H_2$ gas mixtures and filament temperatures. The crystalline volume fraction, grain size and the growth rate of the films were measured by Raman spectroscopy, X-ray diffraction and scanning electron microscopy. The deposit ion behavior of the si1icon thin films was related to properties of the charged clusters, which were in turn controlled by the process conditions. In order to verify the effect of the charged clusters on the growth behavior, three different electric biases of -200 V, 0 V and +25 V were applied to the substrate during the process, The deposition rate at an applied bias of +25 V was greater than that at 0 V and -200 V, which means that the si1icon film deposition was the result of the deposit ion of charged clusters generated in the gas phase. The working pressures had a large effect on the growth rate dependency on the bias appled to the substrate, which indicates that pressure affects the charging ratio of neutral to negatively charged clusters. These results suggest that polycrystalline silicon thin films with high crystalline volume fraction and large grain size can be produced by control1ing the behavior of the charged clusters generated in the gas phase of a normal HWCVD reactor.

• Journal of the Korean institute of surface engineering
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• v.43 no.1
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• pp.7-11
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• 2010

Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.1
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• pp.179-184
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• 1995

Phosphorous was deped in silicon thin films by Ion Mass Doping and Changes in the electrical resistance with respect tko heat treatments were investigated. SOI(Silicon On Insulator) thin films which contain few grain boundaries prepared by ZMR(Zone Melting Recrystallization) of polysilicon films, polysilicon films which have about 1500 $A^{\rarw}$ of grain size prepared by LPCVD at 625.deg. C, and amorphous silicon thin films prepared by LPCVD at low temperature were used as substrates and thermal behavior of phosphorous after RTA(Rapid Thermal Annealing) and furnace annealing was carefully studied. Amorphous thin films showed about 10$^{6}$ .OMEGA./ㅁbefore any heat treatment, while polycrystalline and SOI films about 10$^{3}$.OMEGA./¤. All these films, however, showed about 10.OMEGA./ㅁafter furnace annealing at 700.deg. C for 3hrs and RTA showed about the same trend. Films with grain boundaries showed a certain range of heat treatment which rendered increase of the electrical resistance upon annealing, which could not be observed in amorphous films and segregation of doped phosphorous by diffusion with annealing was thought to be responsible for this abnormal behavior.

• Journal of the Korean institute of surface engineering
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• v.37 no.3
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• pp.164-168
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• 2004

Polycrystalline silicon thin films were deposited by inductively coupled plasma (ICP) assisted magnetron sputtering using a gas mixture of Ar and $H_2$ on a glass substrate at $250^{\circ}C$. At constant Ar mass flow rate of 10 sccm, the working pressure was changed between 10mTorr and 70mTorr with changing $H_2$ flow rate. The effects of RF power applied to ICP coil and $Ar/H_2$ gas mixing ratio on the properties of the deposited Si films were investigated. The crystallinity was evaluated by both X-ray diffraction and Raman spectroscopy. From the results of Raman spectroscopy, the crystallinity was improved as hydrogen mixing ratio was increased up to$ Ar/H_2$=10/16 sccm; the maximum crystalline fraction was 74% at this condition. When RF power applied to ICP coil was increased, the crystallinity was also increased around 78%. In order to investigate the surface roughness of the deposited films, Atomic Force Microscopy was used.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1266-1269
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• 2007

Polycrystalline silicon (poly-Si) films were prepared directly on plastic substrates at a low (< $200^{\circ}C$) by using Catalytic Chemical Vapor Deposition (Cat-CVD) technique without subsequent annealing steps. Surface roughness of the poly-Si layer and the density of the gate dielectric layer were found to be influential to the TFT performance.