한국정보디스플레이학회:학술대회논문집

The Korean Infomation Display Society (한국정보디스플레이학회)
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Performance of Thin Film Transistors Having an As-Deposited Polycrystalline Silicon Channel Layer

  • Hong, Wan-Shick (Dept. of Nano Science and Technology, University of Seoul) ;
  • Cho, Hyun-Joon (Institute of Industrial Technology, University of Seoul) ;
  • Kim, Tae-Hwan (Dept. of Nano Science and Technology, University of Seoul) ;
  • Lee, Kyung-Min (Dept. of Nano Science and Technology, University of Seoul)
  • Published : 2007.08.27
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Abstract

Polycrystalline silicon (poly-Si) films were prepared directly on plastic substrates at a low (< $200^{\circ}C$) by using Catalytic Chemical Vapor Deposition (Cat-CVD) technique without subsequent annealing steps. Surface roughness of the poly-Si layer and the density of the gate dielectric layer were found to be influential to the TFT performance.

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