• Title/Summary/Keyword: poly-Si TFTs

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Low-temperature polycrystalline silicon level shifter using capacitive coupling for low-power operation

  • Chung, Hoon-Ju;Sin, Yong-Won;Cho, Bong-Rae
    • Journal of Information Display
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    • v.11 no.1
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    • pp.21-23
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    • 2010
  • A new level shifter using low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs) for low-power applications is proposed. The proposed level shifter uses a capacitive-coupling effect and can reduce the power consumption owing to its no-short-circuit current. Its power saving over the conventional level shifter is 72% for a 3.3 V input and a 10 V output.

Driving Method with Variable Integration Time for Ambient Light Sensing Circuit

  • Lim, Han-Sin;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.1495-1498
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    • 2008
  • We proposed driving method with variable integration time for ambient light sensing. One operation period of the proposed driving method consists of several sub-integration periods with variable integration time which can enlarge dynamic range of ambient light sensing circuit. Temperature dependent characteristic of p-intrinsic-metal (p-i-m) diode can be compensated using the proposed driving method.

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Full Color Top Emission AMOLED Displays on Flexible Metal Foil

  • Hack, Michael;Hewitt, Richard;Urbanik, Ken;Chwang, Anna;Brown, Julie J.;Lu, Jeng Ping;Shih, Chinwen;Ho, Jackson;Street, Bob;Ramos, Teresa;Rutherford, Nicole;Tognoni, Keith;Anderson, Bob;Huffman, Dave
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.305-308
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    • 2006
  • Advanced mobile communication devices require a bright, high information content display in a small, light-weight, low power consumption package. For portable applications flexible (or conformable) and rugged displays will be the future. In this paper we outline our progress towards developing such a low power consumption active-matrix flexible OLED $(FOLED^{TM})$ display. We demonstrate full color 100 ppi QVGA active matrix OLED displays on flexible stainless steel substrates. Our work in this area is focused on integrating three critical enabling technologies. The first technology component is based on UDC's high efficiency long-lived phosphorescent OLED $(PHOLED^{TM})$ device technology, which has now been commercially demonstrated as meeting the low power consumption performance requirements for mobile display applications. Secondly, is the development of flexible active-matrix backplanes, and for this our team are employing PARC's Excimer Laser Annealed (ELA) poly-Si TFTs formed on metal foil substrates as this approach represents an attractive alternative to fabricating poly-Si TFTs on plastic for the realization of first generation flexible active matrix OLED displays. Unlike most plastics, metal foil substrates can withstand a large thermal load and do not require a moisture and oxygen permeation barrier. Thirdly, the key to reliable operation is to ensure that the organic materials are fully encapsulated in a package designed for repetitive flexing, and in this device we employ a multilayer thin film Barix encapsulation technology in collaboration with Vitex systems. Drive electronics and mechanical packaging are provided by L3 Displays.

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Analysis of An Anomalous Hump Phenomenon in Low-temperature Poly-Si Thin Film Transistors (저온 다결정 실리콘 박막 트랜지스터의 비정상적인 Hump 현상 분석)

  • Kim, Yu-Mi;Jeong, Kwang-Seok;Yun, Ho-Jin;Yang, Seung-Dong;Lee, Sang-Youl;Lee, Hi-Deok;Lee, Ga-Won
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.11
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    • pp.900-904
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    • 2011
  • In this paper, we investigated an anomalous hump phenomenon under the positive bias stress in p-type LTPS TFTs. The devices with inferior electrical performance also show larger hump phenomenon. which can be explained by the sub-channel induced from trapped electrons under thinner gate oxide region. We can confirm that the devices with larger hump have larger interface trap density ($D_{it}$) and grain boundary trap density ($N_{trap}$) extracted by low-high frequency capacitance method and Levinson-Proano method, respectively. From the C-V with I-V transfer characteristics, the trapped electrons causing hump seem to be generated particularly from the S/D and gate overlapped region. Based on these analysis, the major cause of an anomalous hump phenomenon under the positive bias stress in p-type poly-Si TFTs is explained by the GIDL occurring in the S/D and gate overlapped region and the traps existing in the channel edge region where the gate oxide becomes thinner, which can be inferred by the fact that the magnitude of the hump is dependent on the average trap densities.

Flexibility Improvement of InGaZnO Thin Film Transistors Using Organic/inorganic Hybrid Gate Dielectrics

  • Hwang, B.U.;Kim, D.I.;Jeon, H.S.;Lee, H.J.;Lee, N.E.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.341-341
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    • 2012
  • Recently, oxide semi-conductor materials have been investigated as promising candidates replacing a-Si:H and poly-Si semiconductor because they have some advantages of a room-temperature process, low-cost, high performance and various applications in flexible and transparent electronics. Particularly, amorphous indium-gallium-zinc-oxide (a-IGZO) is an interesting semiconductor material for use in flexible thin film transistor (TFT) fabrication due to the high carrier mobility and low deposition temperatures. In this work, we demonstrated improvement of flexibility in IGZO TFTs, which were fabricated on polyimide (PI) substrate. At first, a thin poly-4vinyl phenol (PVP) layer was spin coated on PI substrate for making a smooth surface up to 0.3 nm, which was required to form high quality active layer. Then, Ni gate electrode of 100 nm was deposited on the bare PVP layer by e-beam evaporator using a shadow mask. The PVP and $Al_2O_3$ layers with different thicknesses were used for organic/inorganic multi gate dielectric, which were formed by spin coater and atomic layer deposition (ALD), respectively, at $200^{\circ}C$. 70 nm IGZO semiconductor layer and 70 nm Al source/drain electrodes were respectively deposited by RF magnetron sputter and thermal evaporator using shadow masks. Then, IGZO layer was annealed on a hotplate at $200^{\circ}C$ for 1 hour. Standard electrical characteristics of transistors were measured by a semiconductor parameter analyzer at room temperature in the dark and performance of devices then was also evaluated under static and dynamic mechanical deformation. The IGZO TFTs incorporating hybrid gate dielectrics showed a high flexibility compared to the device with single structural gate dielectrics. The effects of mechanical deformation on the TFT characteristics will be discussed in detail.

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An Ultra Low-Power and High-Speed Down-Conversion Level Shifter Using Low Temperature Poly-Si TFTs for Mobile Applications

  • Ahn, Soon-Sung;Choi, Jung-Hwan;Choi, Byong-Deok;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1279-1282
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    • 2006
  • An ultra low-power down-conversion level shifter using low temperature poly-crystalline silicon thin film transistors is proposed for mobile applications. The simulation result shows that the power consumption of the proposed circuits is only 17% and the propagation delay is 48% of those of the conventional cross-coupled level shifter without additional area. And the measured power consumption is only 21% of that of the crosscoupled level shifter.

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Low Temperature Poly-Si TFTs with Excimer Laser Annealing on Plastic Substrates (플라스틱 기판위에 엑시머 레이저 열처리된 저온 다결정 실리콘 박막 트랜지스터)

  • Choi, Kwang-Nam;Kwak, Sung-Kwan;Kim, Dong-Sik;Chung, Kwan-Soo
    • 전자공학회논문지 IE
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    • v.43 no.2
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    • pp.11-15
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    • 2006
  • In this paper characteristics of polycrystalline silicon crystallized by excimer laser on plastic substrate under 150$^{\circ}C$ is investigated. Amorphous silicon is deposited by rf-magnetron sputter in atmosphere of Ar and He for preventing depletion effect by dehydrogenation as deposition by PECVD. After annealing by 308 nm, 30 Hz, double pulse type XeCl excimer laser, p-chnnel low temperature polycrystalline silicon TFT which maximum mobility is $64cm^2/V{\cdot}s$ at $344mJ/cm^2$ is fabricate.

The Elimination of ion Implantation Damage at the Source/Drain Junction of Poly-Si TFTs (이온주입에 의한 소오스/드레인 접합부 결함을 제거한 다결정 실리콘 박막 트렌지스터)

  • Kang, Su-Hyuk;Jung, Sang-Hoon;Lee, Min-Cheol;Park, Kee-Chan;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1410-1412
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    • 2002
  • TFT의 게이트 전극을 형성하기 전에 소오스/드레인 이온 주입과 ELA를 수행함으로써 이온 주입에 의해 발생하는 결정 결함을 줄이는 새로운 poly-Si TFT를 제안한다. 한번의 ELA 공정을 통해서 채널 실리콘 박막의 결정화와 소오스/드레인의 불순물 활성화를 동시에 이루어 접합부의 결함을 치유하였고, 이온 주입에 의해서 비정질화된 소오스/드레인 실리콘과 채널 비정질 실리콘의 용융조건 차이를 이용하여 소오스/드레인 접합부에 실리콘 그레인의 수평성장을 유도하였다. 제안된 소자는 기존의 소자(이동도 : 86 $cm^2/V{\cdot}S$, ON/OFF 전류비 $6.1{\times}10^6$)에 비해 우수한 특성(이동도 : 171 $cm^2/V{\cdot}S$, ON/OFF 전류비 $4.1{\times}10^7$)을 나타내었다. LDD나 off-set 구조 없이도 소오스/드레인 접합부의 결함이 완전히 제거되어 누설전류가 감소하였고 소오스/드레인 접합부 결함이 있던 자리에 1 ${\mu}m$ 이상의 수평성장 그레인이 위치함으로써 ON 전류도 증가하여 ON/OFF 전류비가 크게 개선되었다.

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Crystallization of amorphous Si by pulse annealing with Ni ferritins

  • Tojo, Yosuke;Miura, Atsushi;Fuyuki, Takashi;Yamashita, Ichiro;Uraoka, Yukiharu
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.553-556
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    • 2009
  • We investigated an application of supramolecular protein, and demonstrated the metal induced lateral crystallization utilizing ferritins with Ni nanoparticles, named the "bio-nano-crystallization". So far, this method has required long time, because of this method condition based on the conventional solid phase crystallization. In this study, we applied the pulsed rapid thermal annealing to bio-nanocrystallization. As a result, we succeeded in the crystallization for a short time. We found that the TFTs characteristics were improved with decrease metal impieties in poly-Si thin films by this method.

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Radiation Resistance Evaluation of Thin Film Transistors (박막트랜지스터의 방사선 내구성 평가)

  • Seung Ik Jun;Bong Goo Lee
    • Journal of the Korean Society of Radiology
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    • v.17 no.4
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    • pp.625-631
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    • 2023
  • The important requirement of industrial dynamic X-ray detector operating under high tube voltage up to 450 kVp for 24 hours and 7 days is to obtain significantly high radiation resistance. This study presents the radiation resistance characteristics of various thin film transistors (TFTs) with a-Si, poly-Si and IGZO semiconducting layers. IGZO TFT offering dozens of times higher field effect mobility than a-Si TFT was processed with highly hydrogenated plasma in between IGZO semiconducting layer and inter-layered dielectric. The hydrogenated IGZO TFT showed most sustainable radiation resistance up to 10,000Gy accumulated, thus, concluded that it is a sole switching device in X-ray imaging sensor offering dynamic X-ray imaging at high frame rate under extremely severe radiation environment such as automated X-ray inspection.