• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.7
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• pp.127-133
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• 1996

In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photoresist reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate form both sides of the main gate. The poly-Si channel layer below the offset oxide is protected form the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of oru new device is the offset region due to the offset oxide. our experimental reuslts show that the offset region, due to the photoresist reflow process, has been sucessfully obtained in order to fabricate the offset gated poly-Si TFTs. The maximum ON/OFF ratio occurs at the L$_{off}$ of 1.1${\mu}$m and exceeds 1X10$^{6}$.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.250-253
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• 2009

Effective methods for monitoring the quality of polycrystalline silicon (poly-Si) films are discussed. Raman spectroscopy is typically used to determine crystallinity of poly-Si, but this method has limitations for data gathering on large substrates for mass production of poly-Si TFT backplanes. Spectroscopic ellipsometry is proposed as an alternative for fast and simple estimation of poly-Si quality on large substrates. By using both ellipsometry and Raman spectroscopy, it is possible to determine whether the quality and uniformity of the poly-Si films meet the criteria required for mass production of TFT backplanes for AMOLED panels.

• Electrical & Electronic Materials
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• v.9 no.10
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• pp.1001-1007
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• 1996

The conduction mechanisms of the off-current in low temperature (.leq. >$600^{\circ}C$) processed polycrystalline silicon thin film transistors (LTP poly-Si TFT'S) have been systematically studied. Especially, the temperature and bias dependence of the off-current between hydrogenated and nonhydrogenated poly-Si TFT's were investigated and compared. The off-current of nonhydrogenated poly-Si TF's is because of a resistive current at low gate and drain voltage, thermally activated current at high gate and low drain voltage, and Poole-Frenkel emission current in the depletion region near the drain at high gate and drain voltage. After hydrogenation it has shown that the off -current mechanism is caused mainly by thermal activation and that the field-induced current component is suppressed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.60-61
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• 2007

In this paper, the p-channel poly Si thin-film transistors (Poly-Si TFT's) using formed by solid phase crystallization (SPC) on glass substrate were fabricated. And we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's to indicate non-volatile memory (NVM) effect. Poly-Si TFT is investigated by measuring the electrical properties of poly-Si films, such as I-V characteristics, on/off current ratio. NVM characteristics is showed by measuring the threshold voltage change of TFT through I-V characteristics.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.144-144
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• 2010

다결정 실리콘 박막트랜지스터 (poly-Si TFTs)는 벌크실리콘을 이용한 MOSFET소자에 비해 실리콘 박막의 형성이 간단하므로 대면적의 공정이 가능하며 다양한 기판위에 적용이 가능하여 LCD, OLED 등의 디스플레이 기기에 많이 이용되고 있다. 또한 poly-Si TFT는 3차원으로 적층된 소자의 제작이 가능하여 고집적의 한계를 극복할 소자로 주목받고 있다. 최근, DRAM은 캐패시터의 축소화와 구조적 공정이 한계점에 도달했으며 이를 극복하기 위하여 SOI 기판을 사용한 하나의 트랜지스터로 DRAM의 동작을 수행하는 1T-DRAM의 연구가 활발히 진행 중이다. 이러한 1T-DRAM 소자를 대면적과 다층구조의 공정이 가능한 poly-Si TFT를 이용하여 구현하면 초고집적의 메모리 소자를 제작 가능할 것이다. 따라서, 본 연구에서는 다결정 실리콘 박막트랜지스터 (poly-Si TFTs)를 이용한 1T-DRAM의 동작 특성을 연구하였다. 소자의 제작 방법으로는 200 nm의 열산화막이 성장된 p-type 실리콘 기판위에 상부실리콘으로 사용될 비정질 실리콘 박막을 LPCVD 방법으로 증착하였다. 다음으로 248 nm의 파장을 가지는 KrF 레이저를 이용한 eximer laser annealing (ELA) 공정을 통하여 결정화된 상부실리콘층에 TFT 소자를 제작하여 전기적 특성을 평가하였다.

• Journal of Sensor Science and Technology
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• v.5 no.1
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• pp.71-77
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• 1996

Considering that polycrystalline silicon, a structural material of the micromachining, is affected by a sacrificial oxide layer, the poly-oxide obtained by the thermal oxidation of polycrystalline silicon is newly proposed and estimated as the sacrificial oxide layer. The grain size of the polycrystalline silicon grown on the poly-oxide is larger than that of poly crystalline silicon grown on the conventional sacrificial oxide layer. As a result of XRD, increase of (111) textures and formation of additional (220) textures are observed on the polycrystaIline silicon deposited on the poly-oxide. Also, the polycrystalline silicon grown on the poly-oxide represents small and uniform stress.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.3
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• pp.235-238
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• 2009

This paper describes the mechanical properties of poly (Polycrystalline) 3C-SiC thin films with $N_2$ in-situ doping. In this work, the poly 3C-SiC film was deposited by APCVD (Atmospheric Pressure Chemical Vapor Deposition) method using single-precursor HMDS (Hexamethyildisilane: $Si_2(CH_3)_6)$ at $1200^{\circ}C$. The mechanical properties of doped poly 3C-SiC thin films were measured by nono-indentation according to the various $N_2$ flow rate. In the case of 0 sccm $N_2$ flow rate, Young's Modulus and hardness were obtained as 285 GPa and 35 GPa, respectively. Young's Modulus and hardness were decreased according to increase of $N_2$ flow rate. The crystallinity and surface roughness was also measured by XRD (X-Ray Diffraction) and AFM (Atomic Force Microscopy), respectively.

• Journal of Sensor Science and Technology
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• v.18 no.3
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• pp.222-225
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• 2009

This paper describes the fabrication and characteristics of Schottky micro hydrogen sensors for high temperatures by using polycrystalline(poly) 3C-SiC thin films grown on Si substrates with thermal oxide layer using APCVD. Pd/poly 3C-SiC Schottky diodes were made and evaluated by I-V and C-V measurements. Electric current density and barrier height voltage were $2{\times}10^{-3}A/cm^2$ and 0.58 eV, respectively. These devices could operate stably at about 400 $^{\circ}$. The characteristics of implemented sensors have been investigated in terms of sensitivity, linearity of response, response rate, and response time. Therefore, from these results, Pd/poly 3C-SiC Schottky devices have very high potential for high temperature $H_2$ sensor applications.

• Journal of Sensor Science and Technology
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• v.17 no.6
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• pp.414-417
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• 2008

This paper describes the fabrication of a Pd/poly 3C-SiC Schottky diode and its characteristics, in which the poly 3C-SiC layer and Pd Schottky contact were deposited by using APCVD and sputter, respectively. Crystalline quality, uniformity, and preferred orientations of the Pd thin film were evaluated by SEM and XRD, respectively. Pd/poly 3C-SiC schottky diodes were fabricated and characterized by I-V and C-V measurements. Its electric current density Js and barrier height voltage were measured as $2{\times}10^{-3}A/cm^2$ and 0.58 eV, respectively. These devices were operated until about $400^{\circ}C$. Therefore, from these results, Pd/poly 3C-SiC Schottky devices have very high potential for high temperature chemical sensor applications.

• Proceedings of the Korean Vacuum Society Conference
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• 1997.02a
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• pp.38-38
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• 1997