• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.497-500
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• 1999

This paper reports on the fabrication and characteristics of recessed gate GaN MESFETs fabricated using a photoelectrochemical wet etching method. The unique etching process utilizes photo-resistive mask and KOH based etchant. GaN MESFETs with successfully recessed gate structure was characterized in terms of dc and RF performance. The fabricated GaN MESFET exhibits a current saturation at $V_{DS}$ = 4 V and a pinch-off at $V_{GS}$ =-3V The peak drain current of the device is about 230mA/mm at 300 K and the value is remained almost same for 500K operation. The $f_{T}$ and $f_{max}$ from the device are 6.357Hz and 10.25 GHz, respectively.y.y.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.5
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• pp.794-803
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• 1987

In this paper, the SPICE 2.G6 JFET subroutine and other related subroutines are modified for circuit simulation of GaAs MESFET IC's. The hyperbolic tangent model is used for the drain current-voltage characteristics of GaAs MESFET's and derived channel-conductance and drain-conductance model from the above current model are implemented into small-signal model of GaAs MESFET's. And, device capacitance model which consider after-pinch-off state are modified, and device charge model for SPICE 2G.6 are proposed. The result of modification is shown to be suitable for GaAs circuit simulator, showing good agreement with experimetal results. Forthermore the DC convergence of this paper is better than that of SPICE 2.G JFET subroutine. GaAs MESFET model in this paper is applied for both depletion mode GaAs MESFET and enhancement-mode GaAs MESFET without difficulty.

• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.3
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• pp.18-24
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• 1977

In this paper, a series inverter circuit is constructed by using the pinch-off characteristics of FET, and itsoutput characteristics is analysed for the variation of gate bias frequency and load. The above constructed circuit could eliminate the unstable output characteristics of SCR-series inverter fir chit by the changes of gate bias frequency and load resistor. But the current capacity of the FET-series inverter circuit is relatively small, and is recommended to be used for light loads.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.2
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• pp.152-159
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• 2010

We propose a semi-analytical current conduction model for depletion-mode n-type nanowire field-effect transistors (NWFETs) with top-gate structure. The NWFET model is based on an equivalent circuit consisting of two back-to-back Schottky diodes for the metal-semiconductor (MS) contacts and the intrinsic top-gate NWFET. The intrinsic top-gate NWFET model is derived from the current conduction mechanisms due to bulk charges through the center neutral region as well as of accumulation charges through the surface accumulation region, based on the electrostatic method, and thus it includes all current conduction mechanisms of the NWFET operating at various top-gate bias conditions. Our previously developed Schottky diode model is used for the MS contacts. The newly developed model is integrated into ADS, in which the intrinsic part of the NWFET is developed by utilizing the Symbolically Defined Device (SDD) for an equation-based nonlinear model. The results simulated from the newly developed NWFET model reproduce considerably well the reported experimental results.

• Korean Journal of Materials Research
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• v.3 no.6
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• pp.645-651
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• 1993

The growth of semi-insulating(SI) high resistant undoped GaAs epilayer has been studied to solve the problems ocurring when GaAs IC is fabricated by the widely used ion implantation directly into the SI GaAs substrate. The EPD ditribution of the SI substrates has been examined, and the suitability of the buffer layers grown by MOCVD and MBE, respectively, has been tested for IC fabrication through leakage current measurement. IJngated FET has been fabricated on the SI epilayer and leakage current through the buffer layer has been measured. In the case of MOCVD grown 1$\mu\textrm{m}$-thick buffer layer, the leakage current is as small as about 270nA/mm, and this value does not affect the pinch-off of FET. In this case, the epilayer quality is affected by the substrate defects because the leakage current distribution is coincided with the EPD distribution of the SI substrate. The 2$\mu\textrm{m}$-thick buffer layer grown by MBE, however, has the better quality, and shows the lower leakage current(40nA/mrn) and higher uniformity.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1167-1172
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• 2013

This paper presents a X-band doppler radar with high conversion gain using a self-oscillating-mixer(SOM) that oscillation and frequency mixing is realized at the same time. To improve phase noise of the SOM oscillator, a ${\lambda}/2$ slotted square patch resonator(SSPR) was proposed, which shows high Q-factor of 175.4 and the 50 % reduced circuit area compared to the conventional resonator. To implement the low power system, low biasing voltage of 1.7 V was supplied. To enhance the conversion gain of the SOM, bias circuit is configured near the pinch-off region of transistor, and the conversion gain was optimized. The output power of the proposed SOM was -3.16 dBm at 10.65 GHz. A high conversion gain of 9.48 dB was obtained whereas DC Power consumption is relatively low about 7.65 mW. The phase noise is -90.91 dBc/Hz at 100 kHz offset. The figure-of-merit(FOM) of the proposed SOM was measured as -181.8 dBc/Hz, which is supplier to other SOMs by more than about 7 dB.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.3
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• pp.201-206
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• 2019

This report constitutes the first demonstration in Korea of single-crystal lateral gallium oxide ($Ga_2O_3$) as a metal-oxide-semiconductor field-effect-transistor (MOSFET), with a breakdown voltage in excess of 480 V. A Si-doped channel layer was grown on a Fe-doped semi-insulating ${\beta}-Ga_2O_3$ (010) substrate by molecular beam epitaxy. The single-crystal substrate was grown by the edge-defined film-fed growth method and wafered to a size of $10{\times}15mm^2$. Although we fabricated several types of power devices using the same process, we only report the characterization of a finger-type MOSFET with a gate length ($L_g$) of $2{\mu}m$ and a gate-drain spacing ($L_{gd}$) of $5{\mu}m$. The MOSFET showed a favorable drain current modulation according to the gate voltage swing. A complete drain current pinch-off feature was also obtained for $V_{gs}<-6V$, and the three-terminal off-state breakdown voltage was over 482 V in a $L_{gd}=5{\mu}m$ device measured in Fluorinert ambient at $V_{gs}=-10V$. A low drain leakage current of 4.7 nA at the off-state led to a high on/off drain current ratio of approximately $5.3{\times}10^5$. These device characteristics indicate the promising potential of $Ga_2O_3$-based electrical devices for next-generation high-power device applications, such as electrical autonomous vehicles, railroads, photovoltaics, renewable energy, and industry.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.8
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• pp.853-859
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• 2014

This study presents a technique for extracting all the extrinsic parameters of HEMTs by minimizing the residual errors between a pinch-off cold-FET's gate and drain pad de-embedded Z-parameters and its modeled Z-parameters calculated by the cold-FET's remaining parameters. The presented technique allows us to successfully extract the remaining extrinsic parameter values as well as the gate and drain pad capacitance value without the additional fabrications of the gate and drain dummy pad.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.49-56
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• 2008

This paper introduces a compact analytical current conduction model of long-channel depletion-mode n-type nanowire field-effect transistors (NWFETs). The NWFET used in this work was fabricated with the bottom-up process and it has a bottom-gate structure. The model includes all current conduction mechanisms of the NWFET operating at various bias conditions. The results simulated from the newly developed NWFET model reproduce a reported experimental results within a 10% error.

• Journal of the Korean Vacuum Society
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• v.2 no.4
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• pp.424-432
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• 1993

AlGaAs/InGaAs/GaAs pseudomorphic structures have been grown by atmosheric pressure-MOCVD . The Al incorporation efficiency is constant but slightly exceeds the Ga incorporation during the growth of AlGaAs layers at $650^{\circ}C$ . Meanwhile , the In incorporation efficiency is constant but slightly less than the Ga incorporation in InGAAs layers. InGaAs/GaAs QWs were grown and their optical properties were characterized . $\delta$-doped Al0.24Ga0.76As/In0.16 Ga0.84As p-HEMT structures were successfully grown by MOCVD and their transport properties were characterized by Hall effect and SdH measurements. SdH Measurements at 3.7K show clear magnetoresistance oscillations and plateaus in the quantum Hall effect confirming the existence of a two-dimensional electron gas(2DEG) and a parallel conduction through the GaAs buffer layer. The fabricated $1.5\mu\textrm{m}$gatelength p-HEMTs having p-type GaAs in the buffer layer show a high transconductance of 200 mS/mm and a good pinch-off characteristics.