• Title/Summary/Keyword: min-sum

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MU-MIMO Scheduling using DNN-based Precoder with Limited Feedback (심층신경망 기반의 프리코딩 시스템을 활용한 다중사용자 스케줄링 기법에 관한 연구)

  • Kyeongbo Kong;Moonsik Min
    • Journal of Broadcast Engineering
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    • v.28 no.1
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    • pp.141-144
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    • 2023
  • Recently, a joint channel estimation, channel quantization, feedback, and precoding system based on deep-neural network (DNN) was proposed. The corresponding system achieved a joint optimization based on deep learning such that it achieved a higher sum rate than the existing codebook-based precoding systems. However, this DNN-based procoding system is not directly applicable for the environments with many users such that a specific user selection can potentially increase the sum rate of the system. Thus, in this letter, we study an appropriate user selection method suitable for DNN-based precoding.

Brand Concept Elaboration Strategy for an Extended Brand: a Case Study for KB Kookmin Card

  • Chun, Seungwoo;Yoo, Changjo;Lee, Sukekyu;Lee, Seon Min
    • Asia Marketing Journal
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    • v.14 no.3
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    • pp.153-167
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    • 2012
  • KB Kookmin Card has separated as an independent corporation from KB Kookmin Bank Credit Card Business Group on March, 2011. Ever since, KB Kookmin Card worked to build its own brand identity. The strategic preparation and conscientious implementations made KB Kookmin Card position in consumer's mind with a strong and unique brand image. Its new brand image was rooted in the inherited strengths of reliable and sincere image. However, it faced the challenge to compete in credit card industry in which most competitors had an advanced and sophisticated image. The strengths of KB Kookmin Card were also at the same time their limitations. KB Kookmin Card took a strategy that strengthened the strengths and improved the weaknesses. It focused on the core competence of being a people's sincere life supporter that helps people make savings from everyday events to make a good sum rather than being a lump sum benefit. The brand introduction strategy was implemented in 2011. The implementation focused on the activities that made internal as well as external customers be aware of the brand. Communication programs using a variety of media were executed to attain this goal. In 2012, second phase communication programs were introduced to elaborate the newly established brand image. It introduced many extended products as well as accessory programs which targeted the segments. Also, various CSR activities in many social domains helped consumers and the public to consider KB Kookmin Card an authentic, caring, trustworthy, and consistently-developing supporter in their everyday lives.

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대학도서관 자료처리 원가계산에 관한 연구

  • 이경호;심의순
    • Journal of Korean Library and Information Science Society
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    • v.10
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    • pp.157-191
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    • 1983
  • The purpose of the study is to build a general cost a counting model for university libraries, to clarify the possible areas of its a n.0, pplication by employing job cost accounting and process cost accounting methods. System analysis is performed as to the fields of acquisition, processing (cataloging & classification), and book shelving system. The existing operation processes and time required for each operation of these three systems are analyzed, from which detailed system flowcharts were drawn and job descriptions and the content of job were identified. The results of the study can be summarized as follows: (1) The processing time of one book in each systems: Oriental books. a. Acquisition system. the time required the time required in case of job cost case of job cost accounting after purchasing, 8 min. 21 sec. the time required in case of process cost accounting 15 min. 7 sec. b. Processing system. the time required for non-duplicate, 34 min. 40 sec. the time required for duplicate, 8 min. 49 sec. the time required for purchasing of more than the time required two copies at a time. 4 min. 44 sec. c. Book shelving system. the time required. 1 min. 43 sec. Western books. a. Acquisition system the required in case of job cost accounting, 9 min. 1 sec. the time required in case of process cost accounting. 15 min. 7 sec. b. Processing system. the time required for non-duplicate, 32 min. 58 sec. the time required for duplicate, 9 min. 26 sec. the time required for purchasing of more than two copies at a time. 5 min. 33 sec. c. Book shelving system. the time required. 1 min. 43 sec. (2) Total sum of processing time and processing cost per book. Oriental books (including material cost) the time required. cost. a. non-duplicate, 51 min. 30 sec. 2, 791 won b. duplicate, 25 min. 39 sec. 1, 580 won c. purchasing of more than two copies as a time, 21 min. 34 sec. 1, 368 won Western books(including material cost) a. non-duplicate, 49 min. 48 sec. 3, 189 won b. duplicate, 26 min. 16 sec. 1, 846 won c. purchasing of more than two copies at a time. 22 min. 23 sec. 1, 388 won

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Multi-mode Layered LDPC Decoder for IEEE 802.11n (IEEE 802.11n용 다중모드 layered LDPC 복호기)

  • Na, Young-Heon;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.11
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    • pp.18-26
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    • 2011
  • This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n wireless LAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A novel memory reduction technique devised using the min-sum decoding algorithm reduces the size of check-node memory by 47% as compared to conventional method. From fixed-point modeling and Matlab simulations for various bit-widths, decoding performance and optimal hardware parameters such as fixed-point bit-width are analyzed. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a 0.18-${\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

The Min-Distance Max-Quantity Assignment Algorithm for Random Type Quadratic Assignment Problem (랜덤형 2차원 할당문제의 최소 거리-최대 물동량 배정 알고리즘)

  • Lee, Sang-Un
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.18 no.3
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    • pp.201-207
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    • 2018
  • There is no known polynomial time algorithm for random-type quadratic assignment problem(RQAP) that is a NP-complete problem. Therefore the heuristic or meta-heuristic approach are solve the approximated solution for the RQAP within polynomial time. This paper suggests polynomial time algorithm for random type quadratic assignment problem (QAP) with time complexity of $O(n^2)$. The proposed algorithm applies one-to-one matching strategy between ascending order of sum of distance for each location and descending order of sum of quantity for each facility. Then, swap the facilities for reflect the correlation of distances of locations and quantities of facilities. For the experimental data, this algorithm, in spite of $O(n^2)$ polynomial time algorithm, can be improve the solution than genetic algorithm a kind of metaheuristic method.

A LDPC decoder supporting multiple block lengths and code rates of IEEE 802.11n (다중 블록길이와 부호율을 지원하는 IEEE 802.11n용 LDPC 복호기)

  • Na, Young-Heon;Park, Hae-Won;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.6
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    • pp.1355-1362
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    • 2011
  • This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. Our LDPC decoder adopts a block-serial architecture based on min-sum algorithm and layered decoding scheme. A novel way to store check-node values and parity check matrix reduces the sizes of check-node memory and H-ROM. An efficient scheme for check-node memory addressing is used to achieve stall-free read/write operations. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

A design of LDPC decoder supporting multiple block lengths and code rates of IEEE 802.11n (다중 블록길이와 부호율을 지원하는 IEEE 802.11n용 LDPC 복호기 설계)

  • Kim, Eun-Suk;Park, Hae-Won;Na, Young-Heon;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.132-135
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    • 2011
  • This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n WLAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A novel memory reduction technique devised using the min-sum decoding algorithm reduces the size of check-node memory by 47% as compared to conventional method. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a $0.18-{\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

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Fully-Parallel Architecture for 1.4 Gbps Non-Binary LDPC Codes Decoder (1.4 Gbps 비이진 LDPC 코드 복호기를 위한 Fully-Parallel 아키텍처)

  • Choi, Injun;Kim, Ji-Hoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.4
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    • pp.48-58
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    • 2016
  • This paper presents the high-throughput fully-parallel architecture for GF(64) (160,80) regular (2,4) non-binary LDPC (NB-LDPC) codes decoder based on the extended min sum algorithm. We exploit the NB-LDPC code that features a very low check node and variable node degree to reduce the complexity of decoder. This paper designs the fully-parallel architecture and allows the interleaving check node and variable node to increase the throughput of the decoder. We further improve the throughput by the proposed early sorting to reduce the latency of the check node operation. The proposed decoder has the latency of 37 cycles in the one decoding iteration and achieves a high throughput of 1402Mbps at 625MHz.

Effective Decoding Algorithm of Three dimensional Product Code Decoding Scheme with Single Parity Check Code (Single Parity Check 부호를 적용한 3차원 Turbo Product 부호의 효율적인 복호 알고리즘)

  • Ha, Sang-chul;Ahn, Byung-kyu;Oh, Ji-myung;Kim, Do-kyoung;Heo, Jun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.9
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    • pp.1095-1102
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    • 2016
  • In this paper, we propose a decoding scheme that can apply to a three dimensional turbo product code(TPC) with a single parity check code(SPC). In general, SPC is used an axis with shortest code length in order to maximize a code rate of the TPC. However, SPC does not have any error correcting capability, therefore, the error correcting capability of the three-dimensional TPC results in little improvement in comparison with the two-dimensional TPC. We propose two schemes to improve performance of three dimensional TPC decoder. One is $min^*$-sum algorithm that has advantages for low complexity implementation compared to Chase-Pyndiah algorithm. The other is a modified serial iterative decoding scheme for high performance. In addition, the simulation results for the proposed scheme are shown and compared with the conventional scheme. Finally, we introduce some practical considerations for hardware implementation.

Extension of Aggregate Functions for Spatiotemporal Data Analysis (데이타 분석을 위한 시공간 집계 함수의 확장)

  • Chi Jeong Hee;Shin Hyun Ho;Kim Sang Ho;Ryu Keun Ho
    • Journal of KIISE:Databases
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    • v.32 no.1
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    • pp.43-55
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    • 2005
  • Spatiotemporal databases support methods of recording and querying for spatiotemporal data to user by offering both spatial management and historical information on various types of objects in the real world. We can answer to the following query in real world: 'What is the average of volume of pesticide sprayed for cach farm land from April to August on 2001, within some query window' Such aggregation queries have both temporal and spatial constraint. However, previous works for aggregation are attached only to temporal aggregation or spatial aggregation. So they have problems that are difficult to apply for spatiotemporal data directly which have both spatial and temporal constraint. Therefore, in this paper, we propose spatiotemporal aggregate functions for analysis of spatiotemporal data which have spatiotemporal characteristic, such as stCOUNT, stSUM, stAVG, stMAX, stMIN. We also show that our proposal resulted in the convenience and improvement of query in application systems, and facility of analysis on spatiotemporal data which the previous temporal or spatial aggregate functions are not able to analyze, by applying to the estate management system. Then, we show the validity of our algorithm performance through the evaluation of spatiotemporal aggregate functions.