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http://dx.doi.org/10.7840/kics.2016.41.9.1095

Effective Decoding Algorithm of Three dimensional Product Code Decoding Scheme with Single Parity Check Code  

Ha, Sang-chul (Korea University school of electrical engineering)
Ahn, Byung-kyu (Korea University school of electrical engineering)
Oh, Ji-myung (LIG nex1 communication R&D Lab)
Kim, Do-kyoung (LIG nex1 communication R&D Lab)
Heo, Jun (Korea University school of electrical engineering)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.41, no.9, 2016 , pp. 1095-1102 More about this Journal
Abstract
In this paper, we propose a decoding scheme that can apply to a three dimensional turbo product code(TPC) with a single parity check code(SPC). In general, SPC is used an axis with shortest code length in order to maximize a code rate of the TPC. However, SPC does not have any error correcting capability, therefore, the error correcting capability of the three-dimensional TPC results in little improvement in comparison with the two-dimensional TPC. We propose two schemes to improve performance of three dimensional TPC decoder. One is $min^*$-sum algorithm that has advantages for low complexity implementation compared to Chase-Pyndiah algorithm. The other is a modified serial iterative decoding scheme for high performance. In addition, the simulation results for the proposed scheme are shown and compared with the conventional scheme. Finally, we introduce some practical considerations for hardware implementation.
Keywords
Turbo Product code; Chase-Pyndiah algorithm; Single Parity Check; Iterative decoding; FPGA implementation;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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