• Journal of the Korea Institute of Information and Communication Engineering
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• v.22 no.1
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• pp.91-99
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• 2018

This paper has proposed a low-noise and high-linear RF receiver supporting TV white space from 470 MHz to 698 MHz), which is implemented in $0.13-{\mu}m$ CMOS technology. It consists of a low-noise amplifier, a RF band-pass filter, a RF amplifier, a passive down-conversion mixer, and a channel-selection low-pass filter. A low-noise amplifier and RF amplifier provide a high voltage gain to improve the sensitivity level. To suppress strong and nearby interferers, two RF filtering schemes have been performed by using a RF BPF and a down-conversion mixer. The proposed LPF has been based on the common-gate topology and adopted a bi-quad cell to achieve -24dB/oct characteristics. In addition, the RF receiver can support the overall TV band by controlling a LO frequency. The simulated results show a voltage gain of 56 dB, a noise figure of less than 2 dB, and an out-of-channel IIP3 of -2.3 dBm. It consumes 37 mA from a 1.5 V supply voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.818-823
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• 2014

A high-gain wideband low noise amplifier (LNA) using $0.25-{\mu}m$ Gallium-Nitride (GaN) MMIC technology is presented. The LNA shows 8 GHz to 15 GHz operation by a distributed amplifier architecture and high gain with an additional common source amplifier as a mid-stage. The measurement results show a flat gain of $25.1{\pm}0.8dB$ and input and output matching of -12 dB for all targeted frequencies. The measured minimum noise figure is 2.8 dB at 12.6 GHz and below 3.6 dB across all frequencies. It consumes 98 mA with a 10-V supply. By adjusting the gate voltage of the mid-stage common source amplifier, the overall gain is controlled stably from 13 dB to 24 dB with no significant variations of the input and output matching.

• Journal of Biomedical Engineering Research
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• v.20 no.2
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• pp.205-212
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• 1999

When we want to observe and record a patient's EEG in an operating room, the operation of electrosurgical unit(ESU) causes undesirable artifacts with high frequency and high voltage. These artifacts make the amplifiers of the conventional EEG system saturated and prevent the system from measuring the EEG signal. This paper describes a high-performance bipolar EEG amplifier for a CSA (compressed spectral array ) system with reduced ESU artifacts. The designed EEG amplifier uses a balanced filter to reduce the ESU artifacts, and isolates the power supply and the signal source of the preamplifier from the ground to cut off the current from the ESU to the amplifier ground. To cancel the common mode noise in high frequency, a high CMRR(common mode rejection ratio) diffferential amplifier is used. Since the developed bipolar EEG amplifier shows high gain, low noise, high CMRR, high input impedance, and low thermal drift, it is possible to observe and record more clean EEG signals in spite of ESU operation. Therefore the amplifier may be applicable to a high-fidelity CSA system.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.11a
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• pp.61-64
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• 2000

We fabricated and characterized Low Noise Amplifier (LNA) using MCM-C (Multi-Chip-Module-Cofired) technology for 2.14 GHz IMT-2000 mobile terminal application. First, We designed LNA circuits and simulated it's high frequency characteristics using circuits simulator. For the simulation, we adopted high frequency libraries of all the devices used in LNA samples. By the simulation, Gain was 17 dB and Noise Figure was 1.4 dB. We used multilayer process of LTCC (Low Temperature Co-fired Ceramics) substrate and conductor, resistor pattern for the MCM-C LNA fabrication. We made 2 buried inductors, 2 buried capacitors and 3 buried resistors. The number of the total layers was 6. On the top layer, we patterned microstrip line and pads for the SMT device. We measured the high frequency characteristics, and the results were 14.7 dB Gain and 1.5 dB Noise Figure.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.2
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• pp.220-223
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• 2016

This letter proposes a low noise amplifier which has low noise figure and high linearity simultaneously using a cascode structure with an additional transistor. The proposed structure minimizes the noise source by using optimizing transistor sizes and also improves linearity from the current bleeding technique. The device was fabricated in a $0.5{\mu}m$ GaAs pHEMT process and has noise figure of 1.1 dB, a voltage gain of 15.0 dB, an $OIP_3$ of 30.8 dBm and an input/output return loss of 11.6 dB/10.4 dB from 1.8 to 2.6 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.10
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• pp.832-835
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• 2017

In this paper, V-band differential low noise amplifier(LNA) using 65-nm CMOS process for high speed wireless data communication is presented. The LNA is composed of 3-stage common-source differential amplifiers with neutralization of feedback capacitances using MOS capacitors and impedance matching utilizing transformers. The fabricated LNA has a peak gain of 23 dB at 63 GHz and 3 dB bandwidth of 6 GHz. The chip area of LNA is $0.3mm^2$ and the LNA consumes 32 mW DC power from 1.2 V supply voltage.

• International Journal of Contents
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• v.2 no.1
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• pp.29-33
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• 2006

The common-source low noise amplifier(LNA) with inductive degeneration using a genetic algorithm is designed and tested for a down converter in an industrial, scientific and medical (ISM) band application and a wireless broadband internet service (WiBro). The genetic algorithm optimizes the reflection coefficients to be well matched the input and output ports between multistage transistor amplifiers, and it generates low voltage standing wave ratio as well as gain flatness of the amplifier. The stability and the gain flatness of the LNA have been improved by combining the matching circuits and the series feedback microstrip lines with inductive degeneration at common-source port. In the frequency range of ISM band and WiBro application operating at $2.3GHz{\sim}2.5GHz$, the measured power gain and maximum voltage standing wave ratio (VSWR) of the LNA are $41{\pm}0.5dB$ and 1.3, and the noise figure of the LNA is lower than 0.85dB. The above results are agreed well with the theoretical values of the amplifiers.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.505-506
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• 2006

In this paper, the linearization technique for CMOS low-noise amplifier (LNA) using the derivative superposition method through the multiple gated transistors configuration is presented. LNA based on 0.13um RF CMOS process has been implemented with a modified cascode configuration using multiple gated common source transistors to fulfill a high linearity. Compared with a conventional cascode type LNA, the third order input intercept point (IIP3) per DC power consumption (IIP3/DC) is improved by 3.85 dB. The LNA achieved 2.5-dBm IIP3 with 13.4-dB gain, 3.6 dB NF at 2.4 GHz consuming 8.56 mA from a 1.5-V supply.

• Journal of Applied Reliability
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• v.11 no.3
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• pp.251-265
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• 2011

Low-noise amplifier(LNA) is a component that amplifies the signal while lowering the noise figure of high-frequency signal. LNA holds a very important position in RF system so that it is widely used for telecommunication. Electro static discharge(ESD) is the most common cause of malfunction for low-powered components, such as Large Scale Integration and IC type LNA is weak in ESD. This thesis studies static effect of communication LNA. It analyzes ESD effect, which occurs within LNA circuit, and describes testing standard and methods. In order to find out LNA's susceptiblity to electro static, two well-recognized communication IC type LNA models were selected to be tested. Then static-induced malfunction was carefully analyzed and it suggests architectural problem and improvement from the LNA's ESD point of view.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.833-836
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• 1999

In this paper, a wideband MMIC LNA was designed using low Q matching network. Gains of 9.8~12.2 ㏈, and noise figures of 1.7~2.1 ㏈ were obtained from the fabricated wideband MMIC LNA in the frequency ranges of 1.5~2.5㎓. And maximum output power of 10.83 ㏈m were obtained at the center frequency of 2 ㎓. The chip size of the fabricated wideband MMIC low noise amplifier is 1.4 mm$\times$1.4 mm.