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http://dx.doi.org/10.5515/KJKIEES.2017.28.10.832

Design of V-Band Differential Low Noise Amplifier Using 65-nm CMOS  

Kim, Dong-Wook (College of Information & Communication Engineering, Sungkyunkwan University)
Seo, Hyun-Woo (College of Information & Communication Engineering, Sungkyunkwan University)
Kim, Jun-Seong (College of Information & Communication Engineering, Sungkyunkwan University)
Kim, Byung-Sung (College of Information & Communication Engineering, Sungkyunkwan University)
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Abstract
In this paper, V-band differential low noise amplifier(LNA) using 65-nm CMOS process for high speed wireless data communication is presented. The LNA is composed of 3-stage common-source differential amplifiers with neutralization of feedback capacitances using MOS capacitors and impedance matching utilizing transformers. The fabricated LNA has a peak gain of 23 dB at 63 GHz and 3 dB bandwidth of 6 GHz. The chip area of LNA is $0.3mm^2$ and the LNA consumes 32 mW DC power from 1.2 V supply voltage.
Keywords
Low Noise Amplifier; CMOS; V-Band;
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